| Foreword: Silicon and Electronics | p. vii |
| Foreword: Silicon and the III-V's: Semiconductor Electronics (Electron, Hole, and Photon) Forever | p. ix |
| Preface | p. xiii |
| List of Contributors | p. xxvii |
| Historical Background | |
| Silicon: Child and Progenitor of Revolution | p. 3 |
| References | p. 9 |
| The Economic Implications of Moore's Law | p. 11 |
| Introduction | p. 11 |
| Moore's Law: A Description | p. 12 |
| The History of Moore's Law | p. 12 |
| The Microeconomics of Moore's Law | p. 23 |
| The Macroeconomics of Moore's Law | p. 30 |
| Moore's Law Meets Moore's Wall: What Is Likely to Happen | p. 32 |
| Conclusion | p. 35 |
| Appendix A | p. 36 |
| References | p. 38 |
| State-of-the-Art | |
| Using Silicon to Understand Silicon | p. 41 |
| Introduction | p. 41 |
| The Electronic Structure Problem | p. 42 |
| The Empirical Pseudopotential Method | p. 42 |
| Ab Initio Pseudopotentials and the Electronic Structure Problem | p. 47 |
| New Algorithms for the Nanoscale: Silicon Leads the Way | p. 50 |
| Optical Properties of Silicon Quantum Dots | p. 52 |
| Doping Silicon Nanocrystals | p. 55 |
| The Future | p. 58 |
| References | p. 58 |
| Theory of Defects in Si: Past, Present, and Challenges | p. 61 |
| Introduction | p. 61 |
| From Empirical to First-Principles | p. 63 |
| First-Principles Theory | p. 66 |
| First-Principles Theory at Non-zero Temperatures | p. 70 |
| Discussion | p. 73 |
| References | p. 74 |
| Structural, Elemental, and Chemical Complex Defects in Silicon and Their Impact on Silicon Devices | p. 79 |
| Introduction | p. 79 |
| Defect Interactions in Single-Crystalline Silicon | p. 80 |
| Precipitation Behavior, Chemical State, and Interaction of Copper with Extended Defects in Single-Crystalline and Multicrystalline Silicon | p. 84 |
| Precipitation Behavior, Chemical State, and Interaction of Iron with Extended Defects in Silicon | p. 91 |
| Pathways for Metal Contamination in Solar Cells | p. 96 |
| Effect of Thermal Treatments on Metal Distributions and on Device Performance | p. 99 |
| Discussion: Chemical States of Metals in mc-Si | p. 101 |
| Discussion: Interactions between Metals and Structural Defects | p. 104 |
| Discussion: Engineering of Metal-Related Nanodefects by Altering the Distributions and Chemical States of Metals in mc-Si | p. 106 |
| Summary and Conclusions | p. 108 |
| References | p. 109 |
| Surface and Interface Chemistry for Gate Stacks on Silicon | p. 113 |
| Introduction: The Silicon/Silicon Oxide Interface at the Heart of Electronics | p. 113 |
| Current Practices and Understanding of Silicon Cleaning | p. 115 |
| Introduction | p. 115 |
| Silicon Cleans Leading to Oxidized Silicon Surfaces | p. 116 |
| Si Cleans Leading to Hydrogen-Terminated Silicon Surfaces | p. 124 |
| Microscopic Origin of Silicon Oxidation | p. 136 |
| Initial Oxidation of Hydrogen-Terminated Silicon | p. 137 |
| High-Permittivity ("High-k") Gate Stacks | p. 147 |
| Introduction | p. 147 |
| Silicon Surface Preparation and High-k Growth: The Impact of Thin Oxide Films on Nucleation and Performance | p. 148 |
| Post-Treatment of the High-k Layer: Nitridation | p. 156 |
| The pFET Threshold Voltage Issue: Oxygen Vacancies | p. 157 |
| Threshold Voltage Control: Oxygen and Metal Ions | p. 158 |
| Conclusion | p. 161 |
| References | p. 161 |
| Enhanced Carrier Mobility for Improved CMOS Performance | p. 169 |
| Introduction | p. 169 |
| Enhanced Carrier Mobility in Si under Biaxial Tensile Strain | p. 169 |
| Devices | p. 170 |
| Strain-Relaxed SiGe Buffer Layers | p. 171 |
| SGOI and SSOI Substrates | p. 175 |
| Defect-Free (Elastic) Strain Relaxation | p. 178 |
| Enhanced Hole Mobility via Biaxial Compressive Strain | p. 181 |
| Other Methods to Increase Carrier Mobility for Si CMOS Applications | p. 183 |
| Hybrid Crystal Orientation | p. 183 |
| Uniaxial Strain | p. 184 |
| Summary | p. 185 |
| References | p. 186 |
| Transistor Scaling to the Limit | p. 191 |
| Introduction | p. 191 |
| Planar Bulk MOSFET Scaling | p. 193 |
| Thin-Body Transistor Structures | p. 196 |
| Ultra-Thin Body (UTB) MOSFET | p. 197 |
| Double-Gate (DG) MOSFET | p. 199 |
| Tri-Gate (TG) MOSFET | p. 205 |
| Back-Gated (BG) MOSFET | p. 205 |
| Fundamental Scaling Limit and Ultimate MOSFET Structure | p. 207 |
| Advanced Gate-Stack Materials | p. 209 |
| High-k Gate Dielectrics | p. 209 |
| Metallic Gate Electrode Materials | p. 210 |
| Performance Enhancement Approaches | p. 213 |
| Enhancement of Carrier Mobilities | p. 213 |
| Reduction of Parasitic Components | p. 215 |
| Alternative Switching Devices | p. 216 |
| Summary | p. 216 |
| References | p. 217 |
| Future Directions | |
| Beyond CMOS Electronics: Self-Assembled Nanostructures | p. 227 |
| Introduction | p. 227 |
| Conventional "Top-Down" Fabrication | p. 227 |
| "Bottom-Up" Fabrication | p. 228 |
| Strain-Induced Nanostructures | p. 229 |
| Metal-Catalyzed Nanowires | p. 235 |
| Catalyst Nanoparticles | p. 235 |
| Nanowire Growth | p. 238 |
| Germanium and Compound-Semiconductor Nanowires | p. 241 |
| Doping Nanowires | p. 243 |
| Connecting Nanowires | p. 244 |
| Comparison of Semiconducting Nanowires and Carbon Nanotubes | p. 250 |
| Potential Applications of Metal-Catalyzed Nanowires | p. 251 |
| Field-Effect Transistors | p. 251 |
| Field-Effect Sensors | p. 252 |
| Interconnections | p. 252 |
| Summary | p. 253 |
| References | p. 254 |
| Hybrid CMOS/Molecular Integrated Circuits | p. 257 |
| Introduction | p. 257 |
| Top-Down Fabrication vs. Bottom-Up Assembly | p. 257 |
| Typical Molecular Device Characteristics | p. 258 |
| MolMOS: Integrating CMOS and Nanoelectronics | p. 259 |
| The CMOS/Nano Interface | p. 260 |
| CMOS/Nano Co-design | p. 262 |
| The Crossbar Array for Molecular Electronics | p. 264 |
| Molecular Memory Structures | p. 265 |
| Programmable Logic via the Crossbar Array | p. 267 |
| Signal Restoration at the Nanoscale: The Goto Pair | p. 268 |
| Hysteresis and NDR based Devices in Programmable Logic | p. 270 |
| MolMOS Architecture | p. 272 |
| The CMOS Interface & I/O Considerations | p. 272 |
| Augmenting the PMLA with CMOS | p. 272 |
| Array Access for Programmability | p. 273 |
| A More Complete Picture of the Overall Architecture | p. 274 |
| Circuit Simulation of MolMOS System | p. 276 |
| Device Modeling for Circuit Simulation | p. 276 |
| Functional Verification of a Stand-Alone Nanoscale PMLA | p. 276 |
| Conclusions and Future Directions | p. 278 |
| References | p. 279 |
| Sublithographic Architecture: Shifting the Responsibility for Perfection | p. 281 |
| Revising the Model | p. 281 |
| Bottom-Up Feature Definition | p. 282 |
| Regular Architectures | p. 283 |
| Statistical Effects Above the Device Level | p. 283 |
| Defect and Variation Tolerance | p. 283 |
| Differentiation | p. 284 |
| NanoPLA Architecture | p. 285 |
| Defect Tolerance | p. 288 |
| Wire Sparing | p. 288 |
| Crosspoint Defects | p. 290 |
| Variations | p. 291 |
| Roundup | p. 291 |
| Testing and Configuration | p. 292 |
| New Abstraction Hierarchy | p. 293 |
| Lessons from Data Storage | p. 293 |
| Abstraction Hierarchy for Computation | p. 293 |
| Conclusions | p. 295 |
| References | p. 295 |
| Quantum Computing | p. 297 |
| What Is Quantum Computing? | p. 297 |
| History | p. 298 |
| Fundamentals | p. 299 |
| Quantum Algorithms | p. 301 |
| Realizing a Quantum Computer | p. 303 |
| Physical Implementations | p. 306 |
| Josephson Junction Circuits | p. 306 |
| Semiconductor Quantum Dots | p. 308 |
| Ion Traps | p. 311 |
| Outlook | p. 312 |
| References | p. 312 |
| Afterwords | |
| Nano-Whatever: Do We Really Know Where We Are Heading? Phys. Stat. Sol. (a) 202(6), 957-964 (2005) | p. 317 |
| Introduction: "Nano-Talk = Giga-Hype?" | p. 317 |
| From Physics and Technology to New Applications | p. 317 |
| Kroemer's Lemma of New Technology | p. 317 |
| Three Examples | p. 318 |
| Lessons | p. 319 |
| Roots of Nano-Technology | p. 320 |
| Back to the Future: Beyond a Single Degree of Quantization | p. 320 |
| Quantum Wires | p. 320 |
| Quantum Dots | p. 321 |
| More Challenges | p. 322 |
| Lithography Alternatives for the Nanoscale | p. 322 |
| "Loose" Nanoparticles | p. 322 |
| "Other" Quantization Effects | p. 323 |
| Charge Quantization and Coulomb Blockade | p. 323 |
| Magnetic Flux Quantization | p. 323 |
| Spintronics | p. 324 |
| Meta-Materials | p. 324 |
| Research vs. Applications Re-visited | p. 325 |
| Conclusion | p. 326 |
| References | p. 326 |
| Silicon Forever! Really? Solid-State Electr. 50(4), 516-519 (2006) | p. 327 |
| Motivation | p. 327 |
| The End of Scaling | p. 327 |
| The "Beginning" of Architecture | p. 328 |
| Silicon Stands Tall | p. 329 |
| The Silicon Wart | p. 330 |
| Beyond Lithography | p. 331 |
| Conclusion | p. 332 |
| Acknowledgements and Disclaimer | p. 333 |
| Citations | p. 333 |
| Index | p. 335 |
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