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Springer Advanced Microelectronics

VLSI MOSFET Applications

By: Howard Huff (Editor), David Gilmer (Editor)

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Hardcover | 30 September 2004

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Issues relating to the high-K gate dielectric are among the greatest challenges for the evolving International Technology Roadmap for Semiconductors (ITRS). More than just an historical overview, this book will assess previous and present approaches related to scaling the gate dielectric and their impact, along with the creative directions and forthcoming challenges that will define the future of gate dielectric scaling technology. Topics include: an extensive review of Moore's Law, the classical regime for SiO2 gate dielectrics; the transition to silicon oxynitride gate dielectrics; the transition to high-K gate dielectrics (including the drive towards equivalent oxide thickness in the single-digit nanometer regime); and future directions and issues for ultimate technology generation scaling. The vision, wisdom, and experience of the team of authors will make this book a timely, relevant, and interesting, resource focusing on fundamentals of the 50 nm Technology Generation and beyond.

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Non-Fiction Engineering & Technology Mechanical Engineering & Materials Materials Science Electronics & Communications Engineering Electronics Engineering Circuits & Components Electronic Devices & Materials Semi-Conductors & Super-Conductors Technology in General Engineering in General

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Published: 21st October 2010

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The Economic Implications of Moore's Law	p. 1
Introduction	p. 1
Moore's Law: A Description	p. 1
The History of Moore's Law	p. 2
The Microeconomics of Moore's Law	p. 13
The Macroeconomics of Moore's Law	p. 21
Moore's Law Meets Moore's Wall: What is Likely to Happen	p. 23
Conclusion	p. 27
Appendix A	p. 28
References	p. 30
Classical Regime for SiO₂
Brief Notes on the History of Gate Dielectrics in MOS Devices	p. 33
Early Attempts to Make Insulating-Gate Field-Effect Transistors; Surface States	p. 33
Passivation of Silicon Surfaces by Thermal Oxidation; Planar Transistor Technology	p. 34
Positive Oxide Charge and Surface States at the Si-SiO₂ Interface	p. 35
Instabilities Due to Ion Drift Effects	p. 36
Phosphate-silicate Glass Helped	p. 37
Other Materials Tried as Gate-Dielectric Layers	p. 37
Thermal Oxidation of Silicon	p. 38
Segregation of Dopants at the Si-SiO₂ Interface	p. 39
Other Silicon Oxide Preparation Techniques	p. 40
Thick Field Oxides	p. 41
Breakdown Strength of SiO₂, Defect Density, Moore's Law	p. 41
Weak Oxide Regions in MOS Structures, Kooi Effect	p. 41
Al Gate MOS Devices; PMOS IC's	p. 42
Silicon Gate MOS Devices, NMOS and CMOS IC's	p. 42
Decrease of Oxide Thickness Connected with Downscaling of MOS Structure	p. 43
References	p. 43
SiO₂ Based MOSFETS: Film Growth and Si-SiO Interface Properties	p. 45
SiO₂ Prior to 1970	p. 45
Introduction	p. 45
A Brief Historical Survey	p. 45
What Is a MOSFET?	p. 46
How Does a MOSFET Work?	p. 48
Interface Electronic States and Charge	p. 48
Implications of the Charges on MOSFET Operation	p. 49
The Silicon Oxidation Model: Early Studies	p. 51
After 1970: Progress in Understanding	p. 55
In situ Real-Time Oxidation Studies: Dry O₂, the Effects of Water and Other Impurities	p. 56
Arrhenius Behavior and Deviations	p. 61
Stress Effects on Oxidation Kinetics	p. 62
Orientation Effects on Oxidation Kinetics	p. 65
Effects of Light on Oxidation Kinetics	p. 68
The Thin Film Regime (< 20 nm)	p. 71
The Si-SiO₂ Interface: Measurement and Implications	p. 73
Modern Era: The Quest for Thinner SiO₂ and Alternatives	p. 76
Ultra-thin SiO₂ Film Metrology	p. 76
Interfacial Roughness at the Si-SiO₂ Interface	p. 80
Ultra-thin Film SiO₂ Films and the Future of Gate Dielectrics	p. 85
References	p. 86
Oxide Reliability Issues	p. 91
Thin Oxide Layer Degradation Under Electrical Stress	p. 91
Interface Trap Creation	p. 92
Oxide Charge Trapping	p. 92
Hole Fluence	p. 93
Neutral Electron Trap Generation	p. 96
Stress-Induced Leakage Current	p. 97
Trap Generation Mechanism: Discussion	p. 100
Oxide Breakdown	p. 102
Breakdown Modeling	p. 102
Soft Breakdown	p. 105
Breakdown Acceleration Models	p. 107
Voltage or Field Extrapolation	p. 108
Temperature Dependence of Breakdown	p. 110
Oxide Reliability Predictions	p. 111
Conclusion	p. 111
References	p. 111
Transition to Silicon Oxynitrides
Gate Dielectric Scaling to 2.0-1.0 nm: SiO₂ and Silicon Oxynitride	p. 123
Device Requirements on Gate Dielectric Scaling	p. 123
Definition of Gate Dielectric Thickness	p. 127
Electron Distribution in Accumulation and Inversion Layers	p. 127
Polysilicon Gate Depletion Effect	p. 127
Gate Capacitance and Equivalent Oxide Thickness (EOT) Determination	p. 130
Tunneling Current of SiO₂	p. 132
Modeling Electron Tunneling from Quasi-bound States	p. 133
Tunneling Current as a Function of Thickness	p. 133
Tunneling Currents of Silicon Oxynitride	p. 135
Application Dependence of Gate Dielectric Limit	p. 137
References	p. 140
Optimal Scaling Methodologies and Transistor Performance	p. 143
Introduction	p. 143
Scaling and Device Physics	p. 145
MASTAR Model	p. 145
Voltage-Doping Transformation	p. 148
Short Channel Effect (SCE)	p. 150
Drain-Induced Barrier Lowering (DIBL)	p. 151
Junction Depth Effect	p. 151
Understanding the """"Good Design Rules""""	p. 153
Limitations of Conventional Scaling	p. 154
Limitations Menacing the V_th/V_dd Scaling	p. 154
Limitations Menacing the T_{ox_e}/L Scaling	p. 155
Limitations Menacing the X_j/L Scaling	p. 161
Limitations Menacing the T_dep/L Scaling	p. 163
Impact on the Roadmap	p. 163
Extending Validity of Moore's Law	p. 165
Strategies Based on Increased Gate Drive (V_dd-V_th)	p. 165
Strategies Based on Even More Aggressive Scaling	p. 169
Strategies Based on New Materials	p. 176
Strategies Based on Improvements of Device Architecture	p. 182
How Far Can We Go and How Much Should We Pay?	p. 187
Conclusions	p. 190
References	p. 192
Silicon Oxynitride Gate Dielectric for Reducing Gate Leakage and Boron Penetration Prior to High-k Gate Dielectric Implementation	p. 195
Introduction	p. 195
Integrated RTCVD Oxynitride(ION) Process	p. 197
Experiment	p. 197
Results and Discussion	p. 198
JVD Nitride	p. 207
Experiment	p. 207
Results and Discussion	p. 207
DPN Oxynitride	p. 211
Experiment	p. 211
Results and Discussion	p. 212
Conclusion	p. 218
References	p. 219
Transition to High-k Gate Dielectrics
Alternative Dielectrics for Silicon-Based Transistors: Selection Via Multiple Criteria	p. 223
Introduction	p. 223
Discussion	p. 226
Development of Selection Criteria	p. 226
Application of the Selection Criteria	p. 239
Conclusions	p. 247
References	p. 248
Materials Issues for High-k Gate Dielectric Selection and Integration	p. 253
Introduction	p. 253
Improved Performance Through Scaling	p. 254
Leakage Current and Power	p. 256
MIS (Metal-Insulator-Semiconductor) Structures	p. 257
Issues for Interface Engineering	p. 257
High-k Device Modeling and Transport	p. 260
Materials Properties and Integration Considerations	p. 261
Permittivity and Barrier Height	p. 261
Thermodynamic Stability on Si	p. 266
Interface Quality	p. 269
Film Morphology	p. 270
Gate Compatibility	p. 272
Process Compatibility	p. 275
Reliability	p. 276
Conclusions	p. 277
References	p. 277
Designing Interface Composition and Structure in High Dielectric Constant Gate Stacks	p. 287
Introduction	p. 287
Thermodynamic Stability of Dielectrics on Silicon	p. 290
Silicide Formation and SiO Evolution During Post-deposition Processing	p. 290
Affect of Excess Oxygen on Final State Energetics	p. 292
Chemical Mechanisms in Silicon Interface Oxidation	p. 295
Kinetic Rate Processes During Metal Oxide Deposition	p. 297
Driving Forces for Reactions During Metal Oxide Deposition on Clean Silicon	p. 297
Role of Surface Pre-treatment and Passivation	p. 300
Important Issues	p. 303
Gate Electrode/Dielectric Interfaces	p. 304
Polysilicon/Dielectric Interfaces	p. 304
Metal/Dielectric Interfaces	p. 304
Conclusion	p. 305
References	p. 306
Electronic Structure of Alternative High-k Dielectrics	p. 311
Introduction	p. 311
SiO₂ and the Si-SiO₂ Interface	p. 313
Interfacial Transition Regions Between Crystalline Si and Non-crystalline SiO₂	p. 313
Local Atomic Structure of SiO₂	p. 315
Electronic Structure of SiO₂	p. 316
Local Atomic Structure of the Si-SiO₂ Interface	p. 319
Alternative Dielectrics	p. 322
Classification of High-K Non-crystalline Dielectrics	p. 322
Electronic Structure of Transition Metal Dielectrics	p. 327
Empirical Correlations Between Electronic Structure and Atomic d-State Energies	p. 327
Extension of Ab Initio Calculations to Transition Metal Oxides	p. 330
Experimental Studies of Electronic Structure	p. 333
Valence Band	p. 333
Anti-bonding Conduction Band States of TM Oxides	p. 333
TM and RE Alloys	p. 335
XPS and AES Results for Zr Silicates	p. 339
Trapping at Transition Metal Atoms in Al₂O₃-Ta₂O₅ Alloys	p. 347
Interface Electronic Structure Applied to Direct Tunneling in Silicate Alloys	p. 348
Conclusion	p. 353
References	p. 355
Physicochemical Properties of Selected 4d, 5d, and Rare Earth Metals in Silicon	p. 359
Introduction	p. 359
Crystal Lattice Site of 4d, 5d, and Rare Earth Metals in Silicon	p. 360
Solubility of 4d, 5d, and Rare Earth Metals in Silicon	p. 361
Diffusivity of 4d, 5d, and Rare Earth Elements in Silicon	p. 362
Diffusivity of Pr, Sr, Ba, Zr, and Hf	p. 362
Diffusivity of Er, Pm, Yb, Tb, Ho, and Mo in Silicon .	p. 364
Diffusivity of Heavy Metals in Silicon: A Discussion	p. 367
Energy Levels in the Band Gap	p. 368
Energy Levels of Y, Zr, and Hf	p. 368
Electrical Levels of Mo, Nb, Ta, and W	p. 369
Electrical Levels of the Rare Earth Elements: Er, Tb, Ho, or Dy	p. 370
Effect of 4d, 5d, and Rare Earth Metals on Minority Carrier Recombination Lifetime and Device Performance	p. 372
Summarizing Discussion	p. 374
References	p. 375
High-k Gate Dielectric Deposition Technologies	p. 379
Atomic Layer Deposition	p. 380
Technology Description	p. 380
Chemical Reaction Mechanisms and Precursors	p. 381
Processing Reactors and Chemical Delivery System	p. 387
Film Composition, Microstructure, and Electrical Results	p. 391
Chemical Vapor Deposition	p. 391
Technology Description	p. 391
Chemical Reaction Mechanisms and Kinetics	p. 392
Processing Reactors and Chemical Delivery System	p. 392
Film Composition, Microstructure, and Electrical Results	p. 393
Plasma-Enhanced Atomic Layer Deposition	p. 393
Technology Description	p. 393
Chemical Reaction Mechanisms and Kinetics	p. 394
Processing Reactors and Chemical Delivery System	p. 395
Film Composition, Microstructure, and Electrical Results	p. 396
Plasma Enhanced Chemical Vapor Deposition	p. 396
Technology Description	p. 396
Chemical Reaction Mechanisms and Kinetics	p. 397
Processing Reactors and Chemical Delivery System	p. 397
Film Composition, Microstructure, and Electrical Results	p. 399
Physical Vapor Deposition	p. 399
Technology Description	p. 399
Chemical Reaction Mechanisms and Kinetics	p. 400
Processing Reactors and Chemical Delivery System	p. 401
Film Composition, Microstructure, and Electrical Results	p. 401
Molecular Beam Epitaxy	p. 403
Technology Description	p. 403
Chemical Reaction Mechanisms and Kinetics	p. 403
Processing Reactors and Chemical Delivery System	p. 404
Film Composition, Microstructure, and Electrical Results	p. 404
Ion Beam Assisted Deposition	p. 404
Technology Description	p. 404
Chemical Reaction Mechanisms and Kinetics	p. 404
Processing Reactors and Chemical Delivery System	p. 405
Film Composition, Microstructure, and Electrical Results	p. 405
Sol-gel Deposition	p. 405
Technology Description	p. 405
Chemical Reaction Mechanisms and Kinetics	p. 406
Processing Reactors and Chemical Delivery System	p. 406
Film Composition, Microstructure, and Electrical Results	p. 406
Summary	p. 406
References	p. 407
Issues in Metal Gate Electrode Selection for Bulk CMOS Devices	p. 415
Background	p. 415
Metal Gate Selection Criteria	p. 416
Other Challenges with Metal Gates	p. 418
Metal Gate Candidates for NMOS Devices	p. 419
Metal Nitrides	p. 419
Metal Silicon Nitrides	p. 423
Binary Metal Alloys	p. 425
Metal Candidates for PMOS Devices	p. 430
Metals on High-k Dielectrics	p. 430
Conclusion	p. 431
References	p. 432
CMOS IC Fabrication Issues for High-k Gate Dielectric and Alternate Electrode Materials	p. 435
Introduction	p. 435
The """"Standard"""" CMOS Flow	p. 436
Isolation	p. 436
Well and Channel Doping	p. 438
Gate Dielectric/Gate Stack	p. 438
Source and Drain	p. 440
Silicide and Contact	p. 440
Insertion of High-k Gate Dielectric into the CMOS Flow	p. 442
High-k Materials as a Substitute for SiON	p. 442
Interactions with/During the Gate Electrode Deposition	p. 444
Gate Electrode Etch Concerns - Stopping on High-k	p. 445
Surface Preparation (Cleans) in the Presence of High-k Materials	p. 445
Poly Silicon Oxidation	p. 445
Source and Drain Extension Formation	p. 446
Spacer Formation	p. 446
Source and Drain Formation	p. 447
Silicidation	p. 448
Contact and Metallization - Low Temperature Processes	p. 448
Sinter	p. 448
Alternative Electrode Materials	p. 449
The Need for Alternative Electrode Materials	p. 449
Material Classes Under Consideration as Alternative Electrode Materials	p. 450
Dual Work Function Gate Stack Implementation	p. 457
Integration of High-k Gate Dielectrics and Metal Gates into Advanced Devices	p. 461
Advanced Planar Integration Schemes	p. 461
Advanced Non-planar Integration Schemes	p. 466
Conclusions	p. 470
References	p. 471
Characterization and Metrology of Medium Dielectric Constant Gate Dielectric Films	p. 483
Introduction	p. 483
Structural and Chemical Characterization of Medium ¿ Film Stacks	p. 486
Characterization Methods	p. 487
Structure/Function Relationships	p. 500
Characterization Results for Medium k	p. 501
Optical Models for Medium k Films	p. 503
References	p. 517
Electrical Measurement Issues for Alternative Gate Stack Systems	p. 521
Introduction	p. 521
Capacitance-Voltage Measurement	p. 522
Overview	p. 522
Background	p. 523
Definition of Capacitance	p. 524
Measurement of Capacitance and Its Output in Series or Parallel Mode	p. 528
More Complex Equivalent Circuits	p. 531
Additional Capacitance-Related Measurement Topics for High-k Gate Stacks	p. 537
Practical Capacitance Measurement Issues	p. 544
Analysis of Device/Material Parameters from Established C-V Data	p. 548
Current-Voltage Measurement	p. 551
Parasitic Series Resistance	p. 551
Temperature Dependence	p. 553
Time Dependence Effects	p. 553
Determination of DC Conduction Mechanisms	p. 556
Sample Design and Preparation Issues	p. 560
Conclusion	p. 562
References	p. 562
High-k Gate Dielectric Materials Integrated Circuit Device Design Issues	p. 567
Introduction	p. 567
Fundamental Issues on Gate Capacitance and Current Modeling	p. 568
Models	p. 568
ZrO₂ and HfO₂ NMOSCAP C_g, I_g-V_g Analysis	p. 574
Conclusions for Fundamental Issues on Gate Capacitance and Current Modeling	p. 579
Wave Function Penetration Effect Issues	p. 579
Quantum Transmitting Boundary (QTBM) Method	p. 580
Effects on Quantization	p. 583
High-k Tunneling Gate Currents Trend Study	p. 584
Wave Function Penetration Effects on Gate Capacitance	p. 586
Maxwell-Wagner Effects and Power Law Dispersion	p. 591
Interfacial Polarization in High-k Gate Stacks	p. 591
Power Law Dispersion and Its Impact on Device Performance	p. 597
Conclusions for Maxwell-Wagner Effects and Power Law Dispersion	p. 602
Conclusions	p. 602
References	p. 603
Future Directions for Ultimate Scaling Technology Generations
High-k Crystalline Gate Dielectrics: A Research Perspective	p. 607
Introduction	p. 607
The Path to the Perovskites and COS	p. 610
MBE	p. 610
Rules for COS	p. 612
The Material System of COS	p. 614
Alkaline Earth Metal Silicide	p. 615
Alkaline Earth Oxides	p. 616
Perovskites	p. 617
The Implementation of COS	p. 619
Layer-Sequenced COS Growth	p. 619
The Importance of the Silicide	p. 625
Alkaline Earth Metal	p. 628
Oxide Growth	p. 628
Electrical Properties	p. 629
Band Offset	p. 630
Interface Traps	p. 631
Channel Mobility	p. 633
Conclusion	p. 634
References	p. 635
High-k Crystalline Gate Dielectrics: An IC Manufacturer's Perspective	p. 639
Introduction	p. 639
Theoretical Overview	p. 644
Perovskite Surface	p. 644
Oxide Deposition	p. 647
Growth Template	p. 648
Substrate Preparation	p. 649
Initial Nucleation	p. 650
Stability of the Interface	p. 653
Structural Properties	p. 654
Band Discontinuity	p. 658
Device Results	p. 661
Conclusion	p. 663
References	p. 664
Advanced MOS-Devices	p. 667
Introduction	p. 667
Prospectus	p. 672
The Ballistic Nanotransitor	p. 674
Vertical Replacement Gate MOSFET	p. 681
The Double-Gate FinFET	p. 688
Silicon-On-Nothing MOSFETs	p. 692
Conclusion	p. 701
References	p. 702
Index	p. 707
Table of Contents provided by Publisher. All Rights Reserved.

Springer Advanced Microelectronics

VLSI MOSFET Applications

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Hardcover

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