| Bio-Inspired Computational Intelligence for the Hardware of Adaptive Systems | p. 1 |
| Techniques of Computational Intelligence | p. 1 |
| Features and Classifications of Hybrid Intelligent Systems | p. 9 |
| Emergent Intelligent Technologies and the Adaptive Hardware Systems: AIS-A Technology for the Adaptive Systems | p. 13 |
| Advanced Hardware Implementation of the Computational Intelligence and Intelligent Technologies | p. 27 |
| Evolvable Hardware: An Overview | p. 28 |
| EHW Classification, Practical Engineering Remarks | p. 30 |
| EHW Technological Support (FPGA, FPAA, FPTA, FPMA, PsoC) | p. 37 |
| Introduction to Programmable Integrated Circuits | p. 38 |
| FPGA Families and Advanced Type of FPGA | p. 40 |
| Field Programmable Analog Arrays(FPAA) | p. 44 |
| Field Programmable Transistor Arrays (FPTA) Produced by NASA JPL | p. 46 |
| Practical Remarks on the Technological Support of EHW | p. 48 |
| EC Based Methods in EHW Implementation: EHW Architectures | p. 50 |
| An Application of GA for the Design of EHW Architectures | p. 63 |
| Global Remarks on Current Methods in EHW Technology and Its Prospectus | p. 70 |
| Hardware Implementation of the Artificial Immune Systems | p. 73 |
| Hardware Implementation of DNA Computing | p. 75 |
| Elements of Intercommunications Inside the AHS/EHW International Community (Conferences; Books; Journals; Elite Departments) | p. 76 |
| Bio-Inspired Analogue and Digital Circuits and Their Applications | p. 83 |
| Introduction | p. 83 |
| Genetic Algorithms for Analogue Circuits Design | p. 84 |
| GA as Tools to Design Analogue Circuits | p. 84 |
| Overview of the Genetic Algorithm | p. 86 |
| Representation | p. 89 |
| Analogue Applications with FPTA Cells | p. 91 |
| Design Optimization of a CMOS Amplifier | p. 92 |
| Formulation of the Optimization Problem | p. 92 |
| Evaluation Engine | p. 94 |
| Optimization Engine | p. 94 |
| Design Optimization of a CMOS Amplifier | p. 95 |
| Evolving Software Models of Analogue Circuits | p. 97 |
| Evolutionary Design of Digital Circuits | p. 99 |
| Combinational Logic Circuits Evolutionary Design | p. 99 |
| Conventional Design Techniques for Arithmetic Adders and Multipliers | p. 102 |
| One Bit Full Adders | p. 102 |
| Parallel Processing Adder | p. 105 |
| CMOS Gates Full Adder | p. 106 |
| The Mirror Adder | p. 107 |
| Full Adder with CMOS Transmission Gates | p. 107 |
| Serial Processing Adder | p. 109 |
| Conventional Binary Multipliers | p. 109 |
| Arithmetic Circuits Designed with Evolutionary Algorithms | p. 112 |
| Full Adders Design | p. 112 |
| Gate-Level Evolutionary Design | p. 114 |
| Binary Multipliers Designed with Evolutionary Algorithms | p. 116 |
| Concluding Remarks on Digital Circuits Evolutionary Design | p. 118 |
| Reconfigurable Analogue Circuits in Mobile Communications Systems | p. 119 |
| Multi-standard Terminals for Mobile Telecommunications | p. 119 |
| Reconfigurable Multi-Standard Analogue Baseband Front-End Circuits in Mobile Communications Systems | p. 122 |
| Reconfigurable RF Receiver Architectures | p. 125 |
| Superheterodyne Receiver | p. 125 |
| Direct - Conversion Architectures | p. 126 |
| Low IF Architecture | p. 127 |
| Software Defined Radio | p. 127 |
| Digital - IF Receiver | p. 129 |
| Fully Reconfigurable Analogue Filters Design | p. 129 |
| Reconfigurable Filter Stage for a Combined Zero-IF/Low-IF Radio Architecture | p. 131 |
| Flexible Zero-IF/Low-IF Radio Architecture | p. 131 |
| Transconductor-Based Reconfigurable and Programmable Analogue Array | p. 133 |
| Modular Gm-C State-Variable "Leapfrog" Filters | p. 135 |
| Simulation Results | p. 139 |
| Conclusions | p. 140 |
| Variable Gain Amplifiers | p. 141 |
| Genetic Algorithms for Reconfigurable Analogue IF Filters Design | p. 146 |
| Biomedical Engineering Applications | p. 148 |
| Electrical Stimulation and Neural Prosthesis | p. 148 |
| Cochlear Prosthesis via Telemetric Link | p. 150 |
| Reconfigurable Circuits in Implantable Auditory Prosthesis | p. 151 |
| AGCs in Auditory Prosthesis | p. 153 |
| Binary Controlled Variable Gain Amplifiers | p. 156 |
| Introduction | p. 156 |
| Digitally Controlled Gain Amplifier with Current Mirrors | p. 156 |
| Current Division Network | p. 160 |
| Programmable Amplifiers with CDN | p. 162 |
| Digitally Controlled Current Attenuator | p. 165 |
| Concluding Remarks | p. 168 |
| References | p. 169 |
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