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| Preface | p. xv |
| Introduction | p. 1 |
| The Magic of Silicon | p. 1 |
| IC Needs for the Twenty-First Century | p. 6 |
| Application-Induced Design Constraints | p. 7 |
| The Dream: Bandgap Engineering in Silicon | p. 10 |
| The SiGe HBT | p. 12 |
| A Brief History of SiGe Technology | p. 14 |
| SiGe HBT Performance Trends | p. 17 |
| The IC Technology Battleground: Si Versus SiGe Versus III-V | p. 22 |
| References | p. 26 |
| SiGe Strained-Layer Epitaxy | p. 35 |
| SiGe Alloys | p. 35 |
| Pseudomorphic Growth and Film Relaxation | p. 36 |
| Putting Strained SiGe into SiGe HBTs | p. 40 |
| The Challenge of SiGe Epitaxy | p. 42 |
| SiGe Growth | p. 44 |
| Surface Preparation | p. 45 |
| Growth Techniques | p. 46 |
| Stability Constraints | p. 48 |
| Theory | p. 50 |
| Experimental Results | p. 54 |
| Stability Calculations | p. 55 |
| Band Structure | p. 56 |
| Density-of-States | p. 58 |
| Band Offsets | p. 59 |
| Transport Parameters | p. 61 |
| Hole Mobility | p. 64 |
| Electron Mobility | p. 65 |
| Choice of SiGe Parameter Models | p. 66 |
| Open Issues | p. 67 |
| References | p. 68 |
| SiGe HBT BiCMOS Technology | p. 73 |
| The Technology Playing Field | p. 73 |
| Integration of SiGe HBTs with CMOS | p. 79 |
| Carbon Doping | p. 82 |
| Passives | p. 85 |
| Reliability and Yield Issues | p. 89 |
| References | p. 92 |
| Static Characteristics | p. 95 |
| Intuitive Picture | p. 95 |
| Collector Current Density and Current Gain | p. 98 |
| J[subscript C] in SiGe HBTs | p. 98 |
| Relevant Approximations | p. 103 |
| Nonconstant Base Doping | p. 104 |
| Other SiGe Profile Shapes | p. 105 |
| Implications and Optimization Issues for [beta] | p. 108 |
| Output Conductance | p. 109 |
| V[subscript A] Trade-offs in Si BJTs | p. 109 |
| V[subscript A] in SiGe HBTs | p. 111 |
| Relevant Approximations | p. 113 |
| Current Gain - Early Voltage Product | p. 115 |
| Other SiGe Profile Shapes | p. 116 |
| Implications and Optimization Issues for V[subscript A] and [beta]V[subscript A] | p. 117 |
| Equivalent Circuit Models | p. 118 |
| Basic Ebers-Moll Model | p. 118 |
| Transport Version | p. 119 |
| Small-Signal Equivalent Circuit Model | p. 120 |
| Avalanche Multiplication | p. 121 |
| Carrier Transport and Terminal Currents | p. 121 |
| Forced-V[subscript BE] Measurement of M - 1 | p. 122 |
| Forced-I[subscript E] Measurement of M - 1 | p. 124 |
| Effects of Self-Heating | p. 127 |
| Impact of Current Density | p. 128 |
| Si Versus SiGe | p. 128 |
| Breakdown Voltages | p. 131 |
| BV[subscript CBO] | p. 132 |
| BV[subscript CEO] | p. 132 |
| Circuit Implications | p. 135 |
| References | p. 135 |
| Dynamic Characteristics | p. 139 |
| Intuitive Picture | p. 139 |
| Charge Modulation Effects | p. 141 |
| Basic RF Performance Factors | p. 143 |
| Current Gain and Cutoff Frequency | p. 143 |
| Current Density Versus Speed | p. 147 |
| Base Resistance | p. 149 |
| Power Gain and Maximum Oscillation Frequency | p. 150 |
| Linear Two-Port Parameters | p. 154 |
| Z-Parameters | p. 154 |
| Y-Parameters | p. 155 |
| H-Parameters | p. 155 |
| S-Parameters | p. 155 |
| Stability, MAG, MSG, and Mason's U | p. 158 |
| Stability | p. 158 |
| Power Gain Definitions | p. 160 |
| MAG and MSG | p. 160 |
| Mason's Unilateral Gain | p. 162 |
| Which Gain Is Better? | p. 162 |
| f[subscript T] Versus f[subscript max] Versus Digital Switching Speed | p. 164 |
| Base and Emitter Transit Times | p. 165 |
| [tau subscript b] in SiGe HBTs | p. 165 |
| Relevant Approximations | p. 168 |
| [tau subscript e] in SiGe HBTs | p. 170 |
| Other SiGe Profile Shapes | p. 170 |
| Implications and Optimization Issues for f[subscript T] | p. 173 |
| ECL Gate Delay | p. 174 |
| ECL Design Equations | p. 175 |
| ECL Power-Delay Characteristics | p. 177 |
| Impact of SiGe on ECL Power Delay | p. 179 |
| References | p. 182 |
| Second-Order Phenomena | p. 185 |
| Ge Grading Effect | p. 186 |
| Bandgap Reference Circuits | p. 189 |
| Theory | p. 194 |
| Measured Data and SPICE Modeling Results | p. 198 |
| The Bottom Line | p. 201 |
| Neutral Base Recombination | p. 204 |
| Theory | p. 205 |
| Experimental Results | p. 212 |
| Impact of NBR on Early Voltage | p. 216 |
| Identifying the Physical Location of the NBR Traps | p. 222 |
| Circuit-Level Modeling Issues | p. 225 |
| Device Design Implications | p. 229 |
| The Bottom Line | p. 231 |
| Heterojunction Barrier Effects | p. 232 |
| High-Injection in SiGe HBTs | p. 234 |
| Experimental Results and Simulations | p. 238 |
| Profile Optimization Issues | p. 241 |
| Compact Modeling | p. 244 |
| The Bottom Line | p. 254 |
| References | p. 256 |
| Noise | p. 261 |
| Fundamental Noise Characteristics | p. 262 |
| Thermal Noise | p. 262 |
| Shot Noise in a pn Junction | p. 263 |
| Shot Noise in Bipolar Transistors | p. 263 |
| Linear Noisy Two-Port Network Theory | p. 264 |
| Two-Port Network | p. 264 |
| Input Noise Voltage and Current in BJTs | p. 267 |
| Noise Figure of a Linear Two-Port | p. 270 |
| Associated Gain | p. 272 |
| Y-Parameter Based Modeling | p. 273 |
| Analytical Modeling | p. 274 |
| Noise Resistance | p. 277 |
| Optimum Source Admittance | p. 278 |
| Minimum Noise Figure | p. 278 |
| Associated Gain | p. 279 |
| Optimal Sizing and Biasing for LNA Design | p. 280 |
| Emitter Width Scaling at Fixed J[subscript C] | p. 280 |
| Emitter Length Scaling at Fixed J[subscript C] | p. 281 |
| Simultaneous Impedance and Noise Matching | p. 284 |
| Current Density Selection | p. 287 |
| A Design Example | p. 288 |
| Frequency Scalable Design | p. 288 |
| SiGe Profile Design Trade-offs | p. 291 |
| Input Noise Current Limitations | p. 292 |
| Input Noise Voltage Limitations | p. 293 |
| Approaches to Noise Improvement | p. 295 |
| SiGe Profile Optimization | p. 296 |
| Experimental Results | p. 296 |
| Low-Frequency Noise | p. 301 |
| Upconversion to Phase Noise | p. 301 |
| Measurement Methods | p. 303 |
| Bias Current Dependence | p. 306 |
| Geometry Dependence | p. 310 |
| 1/f Noise Figures of Merit | p. 312 |
| Substrate and Cross-Talk Noise | p. 314 |
| Noise Grounding Using Substrate Contacts | p. 315 |
| Noise Grounding Using n[superscript +] Buried Layers | p. 315 |
| References | p. 316 |
| Linearity | p. 321 |
| Nonlinearity Concepts | p. 322 |
| Harmonics | p. 323 |
| Gain Compression and Expansion | p. 324 |
| Intermodulation | p. 324 |
| Physical Nonlinearities | p. 329 |
| The I[subscript CE] Nonlinearity | p. 329 |
| The I[subscript BE] Nonlinearity | p. 331 |
| The I[subscript CB] Nonlinearity | p. 332 |
| The C[subscript BE] and C[subscript BC] Nonlinearities | p. 335 |
| Volterra Series | p. 338 |
| Fundamental Concepts | p. 338 |
| First-Order Transfer Functions | p. 340 |
| Second-Order Transfer Functions | p. 343 |
| Third-Order Transfer Functions | p. 345 |
| Single SiGe HBT Amplifier Linearity | p. 348 |
| Circuit Analysis | p. 349 |
| Distinguishing Individual Nonlinearities | p. 351 |
| Collector Current Dependence | p. 352 |
| Collector Voltage Dependence | p. 353 |
| Load Dependence | p. 354 |
| Dominant Nonlinearity Versus Bias | p. 358 |
| Nonlinearity Cancellation | p. 358 |
| Cascode LNA Linearity | p. 359 |
| Optimization Approach | p. 360 |
| Design Equations | p. 365 |
| References | p. 369 |
| Temperature Effects | p. 371 |
| The Impact of Temperature on Bipolar Transistors | p. 372 |
| Current-Voltage Characteristics | p. 372 |
| Transconductance | p. 375 |
| Resistances and Capacitances | p. 376 |
| Current Gain | p. 379 |
| Frequency Response | p. 380 |
| Circuit Performance | p. 381 |
| Cryogenic Operation of SiGe HBTs | p. 383 |
| Evolutionary Trends | p. 384 |
| SiGe HBT Performance Down to 77 K | p. 385 |
| Design Constraints at Cryogenic Temperatures | p. 388 |
| Optimization of SiGe HBTs for 77 K | p. 391 |
| Profile Design and Fabrication Issues | p. 392 |
| Measured Results | p. 394 |
| Helium Temperature Operation | p. 396 |
| dc Characteristics at LHeT | p. 397 |
| Novel Collector Current Phenomenon at LHeT | p. 399 |
| Nonequilibrium Base Transport | p. 406 |
| Theoretical Expectations | p. 409 |
| Experimental Observations | p. 411 |
| Interpretation of Results | p. 414 |
| High-Temperature Operation | p. 416 |
| References | p. 419 |
| Other Device Design Issues | p. 423 |
| The Design of SiGe pnp HBTs | p. 423 |
| Simulation of pnp SiGe HBTs | p. 425 |
| Profile Optimization Issues | p. 426 |
| Stability Constraints in pnp SiGe HBTs | p. 429 |
| Arbitrary Band Alignments | p. 431 |
| Low-Injection Theory | p. 432 |
| Impact of High Injection | p. 434 |
| Profile Optimization Issues | p. 438 |
| Ge-Induced Collector-Base Field Effects | p. 441 |
| Simulation Approach | p. 442 |
| Influence on Impact Ionization | p. 443 |
| Influence on the Base Current Bias Dependence | p. 445 |
| Experimental Confirmation | p. 446 |
| References | p. 448 |
| Radiation Tolerance | p. 453 |
| Radiation Concepts and Damage Mechanisms | p. 455 |
| The Effects of Radiation on SiGe HBTs | p. 460 |
| Transistor dc Response | p. 460 |
| Spatial Location of the Damage | p. 463 |
| Transistor ac Response | p. 464 |
| Si versus SiGe and Structural Aspects | p. 465 |
| Proton Energy Effects | p. 465 |
| Low-Dose-Rate Gamma Sensitivity | p. 467 |
| Broadband Noise | p. 470 |
| Low-Frequency Noise | p. 471 |
| Technology Scaling Issues | p. 476 |
| SiGe HBT Scaling | p. 476 |
| Si CMOS Scaling | p. 480 |
| Circuit-Level Tolerance | p. 483 |
| The Importance of Transistor Bias | p. 483 |
| Bandgap Reference Circuits | p. 485 |
| Voltage Controlled Oscillators | p. 486 |
| Passive Elements | p. 487 |
| Single Event Upset | p. 488 |
| Transistor Equivalent Circuit Under SEU | p. 490 |
| SEU Simulation Methodology | p. 492 |
| Charge Collection Characteristics | p. 493 |
| Circuit Architecture Dependence | p. 496 |
| References | p. 502 |
| Device Simulation | p. 509 |
| Semiconductor Equations | p. 510 |
| Carrier Statistics | p. 510 |
| Drift-Diffusion Equations | p. 513 |
| Energy Balance Equations | p. 515 |
| Boundary Conditions | p. 517 |
| Physical Models | p. 520 |
| Numerical Methods | p. 523 |
| Application Issues | p. 527 |
| Device Structure Specification | p. 527 |
| Mesh Specification and Verification | p. 529 |
| Model Selection and Coefficient Tuning | p. 532 |
| dc Simulation | p. 532 |
| High-Frequency Simulation | p. 534 |
| Qualitative Versus Quantitative Simulations | p. 537 |
| Probing Internal Device Operation | p. 538 |
| Current Transport Versus Operating Frequency | p. 538 |
| Quasi-Static Approximation | p. 538 |
| Regional Analysis of Transit Time | p. 541 |
| Case Study: High-Injection Barrier Effect | p. 544 |
| References | p. 548 |
| Future Directions | p. 549 |
| Technology Trends | p. 549 |
| Performance Limits | p. 551 |
| References | p. 555 |
| Properties of Silicon and Germanium | p. 557 |
| References | p. 558 |
| About the Authors | p. 561 |
| Index | p. 565 |
| Table of Contents provided by Syndetics. All Rights Reserved. |
ISBN: 9781580533614
ISBN-10: 1580533612
Published: 1st December 2002
Format: Hardcover
Language: English
Number of Pages: 588
Audience: General Adult
Publisher: ARTECH HOUSE INC
Country of Publication: US
Dimensions (cm): 24.13 x 15.88 x 3.81
Weight (kg): 1.04
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