RISC-V Microprocessor System-On-Chip Design

Name: RISC-V Microprocessor System-On-Chip Design
Brand: Elsevier US
Price: 346.75 AUD
Availability: PreOrder

By: David Harris, Sarah Harris, Rose Thompson, James Stine

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Paperback | 30 June 2026 | Edition Number 1

At a Glance

Paperback
600 Pages

Dimensions(cm)
23.5 x 19.1

Paperback

$346.75

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Available: 30th June 2026

Preorder. Will ship when available.

RISC-V Microprocessor System-On-Chip Design is intended for a graduate or undergraduate course in microprocessor design. The reader will learn to design and optimize microprocessors and use them in a system-on-chip, applying contemporary design and verification tools. Much of the book describes detailed designs and tradeoffs for the functional blocks in and around a processor. RISC-V Microprocessor System-On-Chip Design is written to be accessible to an advanced undergraduate audience with limited background and will explain concepts from operating systems, VLSI, and memory systems as necessary. High school mathematics is sufficient preparation for most of the book, although the floating point and division chapters will be primarily of interest to those with a curiosity about computer arithmetic. Like Harris and Harris's Digital Design and Computer Architecture textbooks, this book will appeal to students with easy-to-read and complete explanations, sidebars, and occasional humor and cartoons. The book comes with an open-source implementation and will include end-of-chapter problems to extend the RISC-V processor in various ways. Ancilliary materials include a GitHub repository with complete open-source SystemVerilog code, validation code in C and assembly language, and code for benchmarking and booting Linux.

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