RISC Architectures

By: J. C. Heudin, C. Panetto

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Paperback | 31 May 1992

At a Glance

Paperback
272 Pages

Dimensions(cm)
24.13 x 15.88 x 1.27

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The Reduced Instruction Set Computer (RISC) approach aims to provide superior system performance to traditional microprocessor architecture by using a simple architecture where the compiler and processor are closely matched. This work covers the principles and techniques of the RISC approach, describing both the practical and theoretical aspects of the RISC design philosophy. In addition the book gives a technical overview of both commercial and academic RISC microprocessors.

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