High Performance ASIC Design : Using Synthesizable Domino Logic in an ASIC Flow - Razak Hossain

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High Performance ASIC Design

Using Synthesizable Domino Logic in an ASIC Flow

By: Razak Hossain

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Hardcover | 21 August 2008

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160 Pages

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24.41 x 16.99 x 1.12

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Presenting a methodology for using domino logic in an ASIC design flow developed over several years in an industrial context, this text covers practical issues related to the use of domino logic in an automated framework, and brings together all the knowledge needed to apply these design techniques in practice.

Beginning with a discussion of how to achieve high speed in ASIC designs, subsequent chapters detail the design and characterisation of standard cell compatible domino logic libraries and an advanced domino logic synthesis flow. The results achieved by using automated domino logic design techniques, including silicon measurements, are used to validate the presented solution.

With design examples including the implementation of the execution unit of a microprocessor and a Viterbi decoder, this text is ideal for graduate students and researchers in electrical and computer engineering and also for circuit designers in industry.

Presents a methodology developed over several years in an industrial context
Contains all the knowledge needed to use domino logic
Includes detailed, real-world examples.

About the Author

Razak Hossain is Senior Principal Engineer at STMicroelectonics, San Diego, California, where he has worked since 2000 on high speed ASIC chips and design methodologies. He gained his Ph.D. in Electrical Engineering from the University of Rochester, New York, in 1995, before taking a position at Mentor Graphics Corporation, Warren, New Jersey.

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Preface	p. vii
Abbreviations	p. ix
An introduction to domino logic	p. 1
CMOS and NMOS	p. 1
Domino logic circuits	p. 5
Clocking domino logic	p. 12
Summary	p. 15
High-speed digital design	p. 18
Microprocessors since 1989	p. 18
Microarchitectures for high speed	p. 22
Designing and using high-speed memories	p. 31
What to remember if applying domino logic	p. 35
Domino logic library design	p. 37
High-speed digital circuit design	p. 37
An introduction to standard cells	p. 42
Designing a high-performance standard cell library	p. 45
Circuit design of domino logic cells: a qualitative approach	p. 48
Circuit design of domino logic cells: a quantitative approach	p. 51
Characterizing domino logic-compatible registers	p. 63
Layout of domino logic standard cells	p. 65
Timing models for domino logic cells	p. 66
Domino logic synthesis	p. 70
Introduction to domino logic synthesis	p. 70
Unate transform	p. 73
Phase assignment	p. 75
Phase-assignment rules	p. 77
An example domino synthesis flow	p. 86
Schematic capture of domino designs	p. 106
Circuits designed with domino logic in an ASIC flow	p. 108
Introduction	p. 108
Domino integer execution unit	p. 108
A synthesized domino logic DSP core	p. 119
A synthesizable domino logic Viterbi add-compare-select (ACS) test chip	p. 121
Intel's published domino logic synthesis flow	p. 124
Conclusions	p. 126
Evolution of domino logic synthesis	p. 127
The state of digital ASIC design methodologies	p. 127
Process trends and domino logic	p. 128
Clocking methodology for domino circuits	p. 130
Synthesizing other dynamic logic families	p. 132
Flow improvements for domino synthesis	p. 137
The case for domino logic synthesis	p. 141
Index	p. 143
Table of Contents provided by Ingram. All Rights Reserved.

High Performance ASIC Design

Using Synthesizable Domino Logic in an ASIC Flow

At a Glance

Hardcover

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