Embedded DSP Processor Design, Volume 2

Application Specific Instruction Set Processors

By: Dake Liu

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Hardcover | 30 May 2008 | Edition Number 2

At a Glance

Hardcover
808 Pages

Dimensions(cm)
23.5 x 19.05 x 5.08

Hardcover

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This book provides design methods for Digital Signal Processors and Application Specific Instruction set Processors, based on the author's extensive, industrial design experience. Top-down and bottom-up design methodologies are presented, providing valuable guidance for both students and practicing design engineers.

Coverage includes design of internal-external data types, application specific instruction sets, micro architectures, including designs for datapath and control path, as well as memory sub systems. Integration and verification of a DSP-ASIP processor are discussed and reinforced with extensive examples.

FOR INSTRUCTORS: To obtain access to the solutions manual for this title simply register on our textbook website (textbooks.elsevier.com)and request access to the Computer Science or Electronics and Electrical Engineering subject area. Once approved (usually within one business day) you will be able to access all of the instructor-only materials through the ";Instructor Manual"; link on this book's full web page.

* Instruction set design for application specific processors based on fast application profiling
* Micro architecture design methodology
* Micro architecture design details based on real examples
* Extendable architecture design protocols
* Design for efficient memory sub systems (minimizing on chip memory and cost)
* Real example designs based on extensive, industrial experiences

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Introduction to DSP and CPU
Finite length DSP
Architecture and Micro architecture design
Instruction set design ?
Instruction set design ?
ALU and Register file (RF)
MAC (Multiplication and accumulation unit)
Memory sub system and addressing unit
Control path
Design of tools for firmware programmers
Firmware design
Peripheral of DSP cores and processors
Accelerators
Advanced architecture ILP (Instruction level parallelism)
Advanced architecture (On Chip multiple DSP cores)
Design for integration
Review of the design flow and functional verification
Table of Contents provided by Publisher. All Rights Reserved.

Embedded DSP Processor Design, Volume 2

Application Specific Instruction Set Processors

At a Glance

Hardcover

Shipping

How to return your order

Defective items

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