Architecture Design and Validation Methods

By: Egon BÃ¶rger (Editor)

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Hardcover | 28 October 2014

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372 Pages

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24.77 x 16.51 x 1.91

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This book grew out of material which was taught at the International Summer School on Architecture Design and Validation Methods, held June 23-July 5, 1997, on the Island of Lipari and directed to graduate students and young researchers. Since then the course notes have been completely elaborated and extended and additional chapters have been added so that this book offers a comprehensive presentation of the state of the art which leads the reader to the forefront of the current research in the area. The chapters, each of which was written by a group of eminent special- ists in the field, are self-contained and can be read independently of each other. They cover the wide range of theoretical and practical methods which currently used for the specification, design, validation and verification of are hardware/software architectures. Synthesis methods are the subject of the first three chapters. The chapter on Modeling and Synthesis of Behavior, Control and Data Flow focusses on techniques above the register-transfer level. The chapter on Cell-Based Logic Optimizations concentrates on methods that interface logic design with phys- ical design, in particular on techniques for cell-library binding, the back-end of logic synthesis. The chapter on A Design Flow for Performance Planning presents new paradigms for iteration-free synthesis where global wire plans for meeting timing constraints already appear at the conceptual design stage, even before fixing the functionality of the blocks in the plan.

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You Can Find This Book In

Non-Fiction Engineering & Technology Electronics & Communications Engineering Electronics Engineering Circuits & Components Computing & I.T.Computer Science Computer Architecture & Logic Design Systems Analysis & Design Graphical & Digital Media Applications Computer Programming & Software Development Algorithms & Data Structures

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Modeling and Synthesis of Behavior, Control and Data Flow	p. 1
Introduction	p. 1
Behavioral Synthesis	p. 3
High-Level Control	p. 15
Data Flow	p. 24
Conclusion	p. 42
References	p. 42
Cell-based Logic Optimization	p. 49
Introduction	p. 49
Problem Formulation and Analysis	p. 49
Algorithms for Library Binding	p. 52
Boolean Matching	p. 60
Generalized Matching	p. 78
Conclusion	p. 83
References	p. 84
A Design Flow for Performance Planning: New Paradigms for Iteration Free Synthesis	p. 89
Introduction	p. 89
Flow Components	p. 92
Layout Synthesis	p. 99
Placement Versus Floorplan Design	p. 101
Global Wires	p. 115
Wire Planning	p. 122
Gate Sizing	p. 127
Conclusions	p. 137
References	p. 138
Test and Testable Design	p. 141
Introduction	p. 141
Defect Analysis and Fault Modeling	p. 143
External Testing	p. 155
Self-Testable Systems-On-Chip	p. 162
References	p. 185
Machine Assisted Verification	p. 191
Introduction	p. 191
Logic Verification	p. 195
Bit-Vector and Word-Level Verification	p. 207
Verification by Fixed-Point Calculations	p. 211
Verification Techniques for Bounded State Sequences	p. 218
Formally Correct Construction of Pipelined Systems	p. 231
References	p. 238
Models of Computation for System Design	p. 243
Introduction	p. 243
MOCs: Basic Concepts and the Tagged Signal Model	p. 248
Common Models of Computation	p. 261
Codesign Finite State Machines	p. 276
Conclusions	p. 289
References	p. 292
Modular Design for the Java Virtual Machine Architecture	p. 297
Introduction	p. 297
The Trustful Virtual Machine	p. 301
The Defensive Virtual Machine	p. 313
The Diligent Virtual Machine	p. 323
The Dynamic Virtual Machine	p. 334
Related and Future Work	p. 344
The JVM Abstract State Machine	p. 346
References	p. 356
Table of Contents provided by Publisher. All Rights Reserved.

Architecture Design and Validation Methods

At a Glance

Hardcover

Shipping

How to return your order

Defective items

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