VLSI Technology

1. lntroduction.- 1.1 The Significance of Semiconductor Integrated Circuits.- 1.2 Prospects of High-Density Integration.- 1.3 Device Dimensions and Density of Integration.- 1.4 Outline of the Microfabrication Technology.- 2. Electron Beam Lithography.- 2.1 Background.- 2.1.1 History of the Machine Development.- 2.1.2 Classification of the Machines.- a) Electron-Beam Source.- b) Beam Shape.- c) Beam Scanning.- d) Sample Movement.- e) Samples.- 2.1.3 Factors Determining Pattern Accuracy.- a) Beam Diameter.- b) Aberrations in the Electron-Optics System.- c) Sample Movement, Beam-Position Control and Alignment.- d) Proximity Effect.- 2.1.4 Factors Determining the Drawing Speed.- 2.2 Components for Electron-Beam Lithography.- 2.2.1 Electron-Beam Source.- a) Fundamentals.- b) Lanthanum Hexaboride (LaB6) Cathode Electron Gun.- c) Field-Emission (FE) Electron Gun.- 2.2.2 Electron Optical Column.- a) Electromagnetic Lens.- b) Electrostatic Lens.- c) Demagnifying Electron-Optical Column.- d) Magnifying Electron-Optical Column.- 2.2.3 Electron-Beam Delineation.- a) Delineation of Spatially Separated Figures.- b) Delineation of Figures Over the Surface of a Large Work Piece.- 2.2.4 Alignment.- a) Alignment Mark Structure.- b) Mark Position Deciding Method.- c) Writing Position Compensation Method.- d) Comments.- 2.2.5 Radiation Damage.- 2.3 Software for Electron-Beam Lithography.- 2.3.1 Pattern Data Processing.- a) Input Files.- b) Fundamental Pattern Data Processing Operations.- c) Algorithms.- 2.3.2 Correction of Distortion.- 2.3.3 Correction of the Proximity Effect.- a) Fitting the EID Function.- b) Dosage Calculation and Representative Points.- c) Pattern-Shape Adjustment Techniques.- d) Dot-Beam Correction.- e) Simultaneous Correction Method.- 2.3.4 Warped-Wafer Correction.- a) Algorithm.- b) Cubic Interpolation Method.- 2.4 Wafer and Writing Systems.- 2.4.1 EB System with High Current FE Gun (VL-FI).- a) Electron Gun and the Electron-Optical System.- b) Mechanical System.- c) Electronic Control System.- d) Computer System and Software.- e) Experimental Results.- 2.4.2 Variable-Shaped-Beam Lithography (VL-S2).- a) VL-S2 System Configuration.- b) VL-S2 Electron-Optics System.- c) VL-S2 Stage System.- d) VL-S2 Data Transfer Control System.- e) VL-S2 Software System.- f) VL-S2 Pattern Exposure.- 2.4.3 Raster-Scan-Type Electron-Beam Delineator (VL-Rl, VL-R2).- a) VL-R1 Writing Scheme.- b) VL-R1 System Configuration.- c) VL-R1 Delineation Results.- d) VL-R2 Writing Scheme.- e) VL-R2 System Composition.- f) VL-R2 Delineation Results.- g) Conclusion on VL-R1 and VL-R2.- 3. Pattern Replication Technology.- 3.1 UV Replication Technologies.- 3.1.1 Reduction Stepper (VL-SR 2).- a) Imaging Optics.- b) Alignment Mechanism.- 3.1.2 1:1 Stepper (VL-SR 1).- a) Imaging Optics.- b) Alignment Mechanism.- 3.2 Deep-UV Projection System.- 3.2.1 Light Source.- 3.2.2 Alignment.- 3.2.3 Overall System.- 3.3 X-Ray Lithography.- 3.3.1 Problems of X-Ray Lithography.- a) Features.- b) Geometrical Distortions.- c) Wavelength Selection.- 3.3.2 X-Ray Source.- 3.3.3 X-Ray Masks.- a) Inorganic Materials.- b) Organic Materials.- 3.3.4 Alignment.- 3.3.5 Examples of Experimental Systems.- 3.4 Electron-Beam Projection.- 3.4.1 Demagnifying Electron Projection Method.- a) Design of an Electromagnetic Lens with a Large Pole-Piece Bore Diameter.- b) Alignment Procedures.- c) Self-Supporting Metal Foil Mask.- 3.4.2 Photocathode Pattern Transfer System.- a) Imaging System.- b) Photocathode Mask and Illumination Source.- c) Alignment System.- d) System Description.- 3.5 Radiation-Sensitive Resist for Microfabrication.- 3.5.1 Electron-Beam Resist.- a) Positive-Type Electron-Beam Resist.- b) Negative-Type Electron-Beam Resist.- c) Problems of Electron-Beam Resist.- 3.5.2 X-Ray Resist.- a) Positive-Type X-Ray Resist.- b) Negative-Type X-Ray Resist.- 3.5.3 The Future of Electron-Beam and X-Ray Resists.- 4. Mask Inspection Technology.- 4.1 Principles of Mask Inspection.- 4.1.1 Signal Generation and Processing.- a) Detection of Signal.- b) Transmission of Signal.- c) Miscellanous.- 4.1.2 Mask Pattern Inspection Technology.- a) Beam Width and Dimension Accuracy.- b) Dimension Inspection and Its System.- 4.1.3 Mask Defect Inspection.- a) Defect Decision.- b) List of Mask Defect Inspection Systems.- 4.2 Mask Inspection Systems.- 4.2.1 Mask Pattern Inspection System.- a) Dimension Inspection System Using a Light Beam.- b) Dimension Inspection System by Using an Electron Beam.- 4.2.2 The Mask-Defect Inspection System.- a) Optical Mask-Defect Inspection System.- b) Mask-Defect Inspection by an Electron Beam.- 5. Crystal Technology.- 5.1 Overview.- 5.1.1 Crystal Growth and Machining Process.- 5.1.2 Impurities.- 5.2 Impurities in Si Crystals.- 5.2.1 Outline.- 5.2.2 Fourier Transform Infrared Spectroscopy.- 5.2.3 Photoluminescence Spectroscopy.- 5.2.4 Ion Microanalyzer.- 5.2.5 Striation.- 5.2.6 Oxygen Donor.- 5.3 Wafer Bow and Warpage.- 5.3.1 Definition and Measurement Methods.- 5.3.2 The Slicing Condition.- 5.3.3 Warpage of Silicon Wafers in Heat Processing.- 5.3.4 Effect of Mechanical Damage on Thermal Warpage.- 5.3.5 Oxygen Effects on Wafer Thermal Warpage.- 5.4 Thermally Induced Microdefects.- 5.4.1 The Definition of Thermally Induced Microdefects and Their Detection Technique.- a) Characteristics of Microdefects.- b) Infrared Absorption Spectroscopy.- c) Measurement Techniques Utilizing X-Ray Diffraction.- d) Transmission Electron Microscopy.- e) Etching Method.- f) Photoluminescence Spectroscopy.- 5.4.2 The Role of Oxygen and Carbon for the Formation of Thermally Induced Microdefects.- a) Thermally Induced Microdefects in Wafers Where the Carbon and Oxygen Concentrations Are Controlled.- b) Formation Mechanism of Thermally Induced Microdefects.- c) Suppression of Microdefects During LSI Processes.- 5.4.3 Ion Implantation Induced Defects.- 5.4.4 Gettering.- 5.5 Epitaxial Growth.- 5.5.1 Low-Pressure Epitaxial Growth.- 5.5.2 Molecular-Beam Epitaxial Growth.- 6. Process Technology.- 6.1 Dry Etching.- 6.1.1 Dry Etching and Fine Pattern Definition.- 6.1.2 Plasma Etching Equipment.- a) Plasma Etching Equipments and Their Characteristics.- b) Example of the Planar-Type Plasma-Etching Equipment.- 6.1.3 Plasma Etching Technique.- a) Etching Characteristics and Its Accuracy.- b) Etching of Si02.- c) Etching of Si and Poly-Si.- d) Etching of Al.- 6.1.4 Future Prospects.- 6.2 Beam Annealing.- 6.2.1 Laser Annealing in VLSI Technology.- a) Laser Annealing of Ion-Implanted Crystals.- b) Laser Annealing for the Self-Alignment Technology.- c) Crystal Growth by Laser Irradiation.- d) Laser Annealing and Interfacial Reactions.- 6.2.2 Fundamentals of Laser Annealing.- a) Temperature Distribution and Variation.- b) Physical Process Under Laser Irradiation.- 6.2.3 Other Beam Annealing Technologies.- 6.3 Thin-Film Deposition Techniques.- 6.3.1 CVD Technique.- 6.3.2 Evaporation Technique.- 6.4 Metallization.- 6.4.1 Fine Pattern Technology for Metallization.- a) Aluminum Pattern Formation by Parallel-Plate-Reactor-Type Plasma Etching.- b) Pattern Formation by the Lift-Off Technology.- 6.4.2 Refractory Metal Metallization.- 6.5 Evaluation of Gate Oxide Film.- 6.5.1 Corona Charging Method.- 6.5.2 Avalanche Injection Method.- 6.6 Super Clean Environment.- 6.6.1 Cleanness and Its Monitoring.- 6.6.2 Super Clean Environment.- a) Concentration of Dust Particles of Larger Than 0.1 ?m.- b) Dust Generation Rate and Transmission Rate of HEPA Filters.- c) 0.1 ?m-Base Clean Environment.- 7. Fundamentals of Test and Evaluation.- 7.1 Testing and Evaluation of the Device Design.- 7.1.1 Testing of Device-Design Data.- 7.1.2 The Software System for Pattern Check.- 7.2 Device Analysis and Evaluation.- 7.2.1 Methods of Device Analysis and Evaluation.- 7.2.2 Equipment so Far Developed.- a) A System for Precisely Measuring the Temperature in the Infrared.- b) The Electron Micro-Probe Failure Analysis System.- c) A Device Analysis System Based on Laser Scanning.- 7.2.3 Microdevice Analysis and Evaluation.- 7.3 Device Testing.- 7.3.1 Test Methods.- 7.3.2 The VLSI Tester.- 8. Basic Device Technology.- 8.1 Background.- 8.2 Limitations for Miniaturization.- 8.2.1 Physical Limiting Factors Related to Device Characteristics.- a) Weakening of Insulation.- b) Impurity Fluctuation.- c) Electromigration.- d) Heat Generation and Cooling.- e) Drift-Velocity Saturation of Carriers.- f) Impact Ionization.- 8.2.2 Physical Limiting Factors Related to Device Fabrication.- 8.2.3 Examples of Minimum Device Size.- a) Minimum Size of a DSA MOS Transistor.- b) Minimum Size of a Switch Transistor.- 8.3 Prediction of Device Performance Advancements.- 8.3.1 Requirements.- 8.3.2 Forecast of Integration-Density and Speed-Performance Trends.- 8.4 Examples of Device Structure.- 8.4.1 The DSA MOS Transistor.- 8.4.2 Multiple Wall Self-Alignment Technology.- 8.4.3 Quadruply Self-Aligned Stacked High Capacitor RAM.- 8.4.4 Dielectric Isolation.- 8.4.5 I2L.- 8.4.6 SIT (Static Induction Transistor).- 8.4.7 GaAs IC Technology.- 8.4.8 Josephson Junction Devices.- 8.5 Device Structure.- 8.5.1 Logic Circuit.- a) Ultrafast Logic Circuits.- b) High-Density MOS VLSI Logic.- c) The VLSI System.- d) Gigabit Logic Systems.- 8.5.2 Memory Circuits.- a) Static Memories with Weak Inversion, Operating the MOS Transistor as a Load.- b) The CML Compatible High-Speed Static MOS Memory.- c) The DSA MOS High-Speed Static Memory.- d) Dynamic Memories.- References.