Timing Optimization Through Clock Skew Scheduling

By: Ivan S. Kourtev, Eby G. Friedman, Baris Taskin

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Hardcover | 31 March 2000

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220 Pages

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24.13 x 15.88 x 1.91

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History of the Book The last three decades have witnessed an explosive development in integrated circuit fabrication technologies. The complexities of cur rent CMOS circuits are reaching beyond the 100 nanometer feature size and multi-hundred million transistors per integrated circuit. To fully exploit this technological potential, circuit designers use sophisticated Computer-Aided Design (CAD) tools. While supporting the talents of innumerable microelectronics engineers, these CAD tools have become the enabling factor responsible for the successful design and implemen tation of thousands of high performance, large scale integrated circuits. This research monograph originated from a body of doctoral disserta tion research completed by the first author at the University of Rochester from 1994 to 1999 while under the supervision of Prof. Eby G. Friedman. This research focuses on issues in the design of the clock distribution net work in large scale, high performance digital synchronous circuits and particularly, on algorithms for non-zero clock skew scheduling. During the development of this research, it has become clear that incorporating timing issues into the successful integrated circuit design process is of fundamental importance, particularly in that advanced theoretical de velopments in this area have been slow to reach the designers' desktops.

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Non-Fiction Engineering & Technology Electronics & Communications Engineering Electronics Engineering Circuits & Components Technology in General Engineering in General Computing & I.T.Computer Science Energy Technology & Engineering Electrical Engineering Graphical & Digital Media Applications

Computer-Aided Design CAD

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Paperback

Published: 3rd October 2012

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List of Figures
List of Tables
Preface
Introduction	p. 1
VLSI Systems	p. 7
Signal Delay in VLSI Systems	p. 19
Timing Properties of Synchronous Systems	p. 43
Clock Scheduling and Clock Tree Synthesis	p. 69
Clock Scheduling for Improved Reliability	p. 97
Practical Considerations	p. 123
Experimental Results	p. 139
Conclusions	p. 147
Future Directions	p. 151
References	p. 159
Numerical Illustration of Algorithms	p. 169
Glossary of Terms	p. 173
Graphical Illustration of Results	p. 177
Index	p. 191
About the Authors	p. 193
Table of Contents provided by Blackwell. All Rights Reserved.

Timing Optimization Through Clock Skew Scheduling

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Hardcover

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You Can Find This Book In

Other Editions and Formats

Paperback

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