| Foreword | p. xi |
| Acknowledgments | p. xiii |
| Notes on nomenclature, acronyms and useful data | p. xv |
| List of symbols | p. xvii |
| Introduction | p. 1 |
| Statement of the problem | p. 1 |
| Design approaches | p. 2 |
| A simple example | p. 4 |
| Yield | p. 7 |
| The role of device physics | p. 8 |
| MMIC types and chip functions | p. 11 |
| Scale of IC fabrication | p. 11 |
| Applications | p. 12 |
| Civil | p. 12 |
| Military | p. 14 |
| Chip functions | p. 15 |
| Example MMICs | p. 17 |
| Overview of passive elements | p. 29 |
| Introduction | p. 29 |
| Microstripline | p. 30 |
| Inductors | p. 34 |
| Capacitors | p. 41 |
| Resistors | p. 47 |
| The Lange coupler | p. 49 |
| Other components | p. 50 |
| Final remarks | p. 52 |
| PIN and Schottky diodes | p. 55 |
| Introduction | p. 55 |
| Schottky diodes | p. 56 |
| PIN diodes | p. 63 |
| MMIC uses of PIN and Schottky diodes | p. 67 |
| Elementary FET principles | p. 69 |
| Introduction | p. 69 |
| Review of Si JFET operation | p. 70 |
| Current saturation in the GaAs MESFET | p. 77 |
| Mechanism of current saturation--summary | p. 82 |
| Essential enhancements | p. 83 |
| Si JFET | p. 83 |
| GaAs MESFET | p. 84 |
| Equivalent circuit of the GaAs MESFET | p. 85 |
| Concluding remarks | p. 87 |
| MESFETs | p. 91 |
| Introduction | p. 91 |
| Brief outline of structure | p. 91 |
| Equivalent circuit--physical basis | p. 95 |
| Signal delay | p. 95 |
| Charge storage | p. 99 |
| Current modulation | p. 109 |
| Transconductance delay | p. 110 |
| Intrinsic equivalent circuit | p. 112 |
| Configuration | p. 112 |
| Voltage dependence of the space-charge layer extension, X | p. 116 |
| Gate strip inductance, [script l][subscript g] | p. 121 |
| Channel, or intrinsic, resistance, R[subscript i] | p. 121 |
| Channel current, I[subscript CH] | p. 121 |
| Intrinsic transconductance, g[subscript m0] | p. 122 |
| Gate-channel capacitance, C[subscript gc] | p. 123 |
| Gate-drain capacitance, C[subscript gd] | p. 123 |
| Transconductance delay, [tau][subscript gm] | p. 124 |
| Implications for FET design and usage | p. 124 |
| Output conductance and other microwave effects of substrate current | p. 125 |
| Effect of surface charge, non-uniform doping and gate recess depth | p. 135 |
| Series parasitic resistances R[subscript s] and R[subscript d] and effect on equivalent circuit | p. 138 |
| Source resistance, R[subscript s] | p. 139 |
| Drain resistances, R[subscript D] and R[subscript d] | p. 142 |
| Gate resistance | p. 145 |
| Geometric capacitance | p. 146 |
| Via-hole inductance | p. 155 |
| GaAs FET noise | p. 156 |
| Power MMICs | p. 163 |
| High electron mobility transistors | p. 189 |
| Introduction | p. 189 |
| Energy band line-up | p. 190 |
| Physical basis and structure | p. 192 |
| Practical HEMT structures | p. 196 |
| Principal equivalent circuit elements | p. 198 |
| HEMT noise | p. 201 |
| Prospects for HEMT integration | p. 202 |
| Reverse modeling GaAs MESFETs and HEMTs | p. 205 |
| Introduction | p. 205 |
| Reverse modeling for gate length | p. 205 |
| Errors in eqns (8.2) and (8.6) | p. 211 |
| Extension to HEMTs | p. 211 |
| General comments | p. 215 |
| Reverse modeling for channel doping | p. 218 |
| Conclusion | p. 219 |
| Design limits | p. 221 |
| Introduction | p. 221 |
| Limits to small-signal behavior | p. 222 |
| Gain, frequency and voltage, and gate length | p. 222 |
| Effect of gatewidth, Z[subscript G] | p. 225 |
| Input and output reflection coefficient | p. 232 |
| Maximum Tunable Gain (MTG), MAG, MSG and MUG | p. 242 |
| Limits to large-signal (power) behavior | p. 248 |
| FETs in amplifiers | p. 259 |
| Introduction | p. 259 |
| Amplifier topologies and design principles | p. 261 |
| Reactively matched amplifiers | p. 263 |
| Design of a two-element matching or gain slope compensation network | p. 268 |
| Lossy matched amplifiers | p. 277 |
| Feedback amplifiers | p. 279 |
| Distributed amplifiers | p. 287 |
| The matrix amplifier | p. 300 |
| Balanced amplifiers | p. 303 |
| First trial device synthesis | p. 305 |
| FET synthesis by reverse modeling | p. 310 |
| FET synthesis for distributed power amplifiers | p. 312 |
| Power-impedance considerations | p. 313 |
| Frequency considerations | p. 315 |
| FET synthesis--example | p. 316 |
| Final remarks | p. 321 |
| Computer-aided design | p. 325 |
| Introduction | p. 325 |
| Sensitivity analysis--basis | p. 327 |
| Application of the Monte Carlo method to yield forecasting | p. 337 |
| Uses of yield forecasting | p. 343 |
| FET centering | p. 344 |
| Longer-term developments | p. 346 |
| Future developments | p. 357 |
| Index | p. 365 |
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