Integrated Circuit Packaging, Assembly and Interconnections

By: William J. Greig

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Hardcover | 30 March 2007

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Hardcover
328 Pages

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24.0 x 15.88 x 1.91

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Reviewing the various IC packaging, assembly, and interconnection technologies, this professional guide and reference provides an overview of the materials and the processes, as well as the trends and available options, that encompass electronic manufacturing. It covers both the technical issues and touches on some of the reliability concerns with the various technologies applicable to packaging and assembly of the IC.

The focus is on the electronic manufacturing process, which in its simplest form involves assembly of the IC into a package or interconnect substrate or board. The book discusses the various packaging approaches available, namely, single chip, multichip, and Chip On Board; the assembly options, chip & wire, tape automated bonding, and flip chip; and the essential high density package/substrate manufacturing technologies, thin film, thick film, cofired ceramic, and laminate printed wiring board (PWB) processes. Included also is a discussion of high density PWBs using build up/sequential processes.

Integrated Circuit Packaging, Assembly and Interconnections is an introduction, a review and an update of packaging technologies.

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You Can Find This Book In

Non-Fiction Engineering & Technology Electronics & Communications Engineering Electronics Engineering Circuits & Components Energy Technology & Engineering Electrical Engineering Other Technologies & Applied Sciences Applied Optics Mechanical Engineering & Materials Mechanical Engineering Technology in General

Engineering in General Technical Design Electronic Devices & Materials

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Published: 29th October 2010

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List of Figures	p. xiii
List of Tables	p. xxi
Preface	p. xxiii
Acknowledgements	p. xxv
About the Author	p. xxvii
Electronic Manufacturing and the Integrated Circuit	p. 1
Microelectronics and the Transistor	p. 1
The Integrated Circuit and Moore's Law (2-5)	p. 1
Electronics Manufacturing and the Technology Drivers	p. 3
A Technology Driver-The Integrated Circuit	p. 8
The International Roadmap for Semiconductors (ITRS)	p. 10
Integrated Circuit Manufacturing: A Technology Resource	p. 15
IC Manufacturing Technologies	p. 15
Overview of the IC Manufacturing Processes	p. 15
The Manufacturing Environment	p. 17
The Photolithographic Process	p. 20
IC Methodologies and Packaging, Assembly, Interconnections	p. 28
Packaging the IC-Single Chip Packaging	p. 31
The IC Package	p. 31
Trends in IC Packaging	p. 32
Area Array Packages-PGA, BGA	p. 36
BGA Surface Mount Assembly	p. 41
BGA Attributes	p. 42
BGA Concerns	p. 42
The Future	p. 43
Lead-Free Manufacturing	p. 43
The Chip Scale Package	p. 47
The Chip Scale Package, CSP	p. 47
Chip Scale Package Manufacturing Technologies	p. 48
The [Mu]BGA	p. 52
Wafer Level Packaging-The WLP	p. 55
Reliability Concerns	p. 57
Summary	p. 58
Multichip Packaging	p. 61
Multichip Packaging (MCP)	p. 61
MCP Substrate/Package Technologies	p. 62
The Hybrid Circuit	p. 62
The Multichip Module (MCM)	p. 65
3-D Packaging	p. 67
3-D Packaging and the Flex Circuit	p. 71
Die Stacking Using Silicon Thru-Vias	p. 75
System in Package (SiP)/System on Package (SoP)	p. 77
Summary-Benefits of Multichip Packaging	p. 79
Known Good Die (KGD)	p. 81
The KGD Story	p. 81
The Semiconductor Assembly/Packaging/Test Process	p. 81
The Bare Die Problem	p. 83
Addressing the Bare Die Problem-Wafer Lot Acceptance Testing	p. 86
Known Good Die (KGD)	p. 86
Wafer Level Burn-in and Test (WLBT)	p. 90
Industry Responsiveness	p. 92
Packaging Options-Chip on Board	p. 93
Direct Chip Attach (DCA) and Chip on Board (COB)	p. 93
The COB Process	p. 94
Flip Chip On Board (FCOB)	p. 98
Summary	p. 101
Chip & Wire Assembly	p. 103
Chip & Wire Assembly	p. 103
Die/Wire Bonding and Bonder Equipment Development	p. 103
Impact of the IC on Bonding and Bonder Development	p. 105
The Chip and Wire Assembly Process	p. 105
Bonding Wire: Au, Al, and Cu	p. 106
Bonding Methods	p. 108
Types of Bonds	p. 110
The Ball Bonding Process	p. 110
Wedge Bonding	p. 111
Obstacles to Quality and Reliable Wire Bonding	p. 112
Metallurgical Concerns and Surface Finishes	p. 114
Handling and Storage	p. 118
Verifying Wire Bonding Quality	p. 118
Responding to the IC and End Product	p. 120
Wire Bonding on Organic Substrates, The PBGA and PWB	p. 125
Summary	p. 127
Tape Automated Bonding-TAB	p. 129
Background-Minimod	p. 129
Tape Automated Bonding	p. 129
The TAB Tape	p. 129
TAB Assembly	p. 134
Reliability Concerns	p. 138
Areas of Applications	p. 139
Summary	p. 140
Flip Chip-The Bumping Processes	p. 143
Background	p. 143
IBM's Flip Chip Transistor	p. 143
Wafer Bumping	p. 147
Bump Deposition Processes	p. 150
Comparing Flip Chip Solder Bumping Processes	p. 160
Polymer/Bumps	p. 161
Stud/Ball Bumping	p. 163
Trends in Bumping Technology	p. 165
Flip Chip Assembly	p. 169
Basic Flip Chip Assembly	p. 169
Flip Chip Bonding Processes	p. 170
The Solder Reflow Process	p. 171
Flip Chip Solder Joint Reliability	p. 173
Reliability and Lead-Free Solders	p. 182
Solder Reflow Attach: Comments, Concerns	p. 183
Alternative Flip Chip Bonding Methods	p. 183
Adhesive Flip Chip Attachment	p. 184
Adhesive Bumps	p. 188
Summary: Advantages of Flip Chip as a First Level Interconnect	p. 189
HDI Substrate Manufacturing Technologies: Thin Film Technology	p. 193
High Density Package/Substrate Manufacturing Technologies	p. 193
Thin Film Technology	p. 193
The Patterning Process	p. 195
Processing an HDI Substrate Interconnect	p. 200
Thin Film Materials	p. 202
Alternative Thin Film Processes for MCP Applications	p. 212
High Density Interconnects-Cost and Yield Considerations	p. 218
HDI Substrate Manufacturing Technologies: Thick Film Technology	p. 221
Thick Film Technology	p. 221
The Thick Film Process	p. 221
The Patterning Process	p. 222
Thick Film Screen Printing and MCM-C/HDI	p. 227
Advanced Thick Film Patterning Processes	p. 229
HDI Substrate Manufacturing Technologies: Cofired Ceramic	p. 233
The Cofired Ceramic Tape Technology	p. 233
IBM's Multilayer Interconnect (MLI) Packaging Program	p. 234
The Co-fired Ceramic Technology	p. 236
The Cofired Ceramic Tape Process	p. 237
High Temperature Cofired Ceramic HTCC	p. 237
Low Temperature Co-fired Ceramic LTCC	p. 238
Comparing Thick Film, HTCC and LTCC	p. 239
Advanced LTCC Processes	p. 241
Summary Co-fired Ceramic Process Technologies	p. 243
Substrate Manufacturing Technologies: Organic Packages and Interconnect Substrate	p. 245
The Level 2.0 Printed Wiring Board	p. 245
Overview of Conventional MLB Processing	p. 247
The PBGA and the MCM-L	p. 248
Impact of the IC on Packaging and Interconnect Technology	p. 249
Vias and HDI	p. 251
IBM's SLC and HDI PWB Build Up Technology (BUT)	p. 253
Current Status Microvia HDI PWBs	p. 256
Enhancing HDI PWBs-Embedded Passives	p. 257
Technology Status	p. 259
Acronymns and Definitions	p. 261
Microelectronics Glossary	p. 265
Index	p. 289
Table of Contents provided by Ingram. All Rights Reserved.

Integrated Circuit Packaging, Assembly and Interconnections

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Hardcover

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