Guidebook for Managing Silicon Chip Reliability

By: Michael Pecht, Riko Radojcic, Gopal Rao

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Paperback | 7 October 2019 | Edition Number 1

At a Glance

Paperback
226 Pages

Dimensions(cm)
23.4 x 15.6 x 1.22

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Achieving cost-effective performance over time requires an organized, disciplined, and time-phased approach to product design, development, qualification, manufacture, and in-service management. Guidebook for Managing Silicon Chip Reliability examines the principal failure mechanisms associated with modern integrated circuits and describes common practices used to resolve them.

This quick reference on semiconductor reliability addresses the key question: How will the understanding of failure mechanisms affect the future?

Chapters discuss:

failure sites, operational loads, and failure mechanism

intrinsic device sensitivities

electromigration

hot carrier aging

time dependent dielectric breakdown

mechanical stress induced migration

alpha particle sensitivity

electrostatic discharge (ESD) and electrical overstress

latch-up

qualification

screening

guidelines for designing reliability

Guidebook for Managing Silicon Chip Reliability focuses on device failure and causes throughout - providing a thorough framework on how to model the mechanism, test for defects, and avoid and manage damage. It will serve as an exceptional resource for electrical engineers as well as mechanical engineers working in the field of electronic packaging.

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