Frontiers in Electronic Testing

By: Angela Krstic, Kwang-Ting (Tim) Cheng

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Hardcover | 31 October 1998

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Hardcover
212 Pages

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24.77 x 16.51 x 1.91

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With the ever-increasing speed of integrated circuits, violations of the performance specifications are becoming a major factor affecting the product quality level. The need for testing timing defects is further expected to grow with the current design trend of moving towards deep submicron devices. After a long period of prevailing belief that high stuck-at fault coverage is sufficient to guarantee high quality of shipped products, the industry is now forced to rethink other types of testing.
Delay testing has been a topic of extensive research both in industry and in academia for more than a decade. As a result, several delay fault models and numerous testing methodologies have been proposed. Delay Fault Testing for VLSI Circuits presents a selection of existing delay testing research results. It combines introductory material with state-of-the-art techniques that address some of the current problems in delay testing.
Delay Fault Testing for VLSI Circuits covers some basic topics such as fault modeling and test application schemes for detecting delay defects. It also presents summaries and conclusions of several recent case studies and experiments related to delay testing. A selection of delay testing issues and test techniques such as delay fault simulation, test generation, design for testability and synthesis for testability are also covered.
Delay Fault Testing for VLSI Circuits is intended for use by CAD and test engineers, researchers, tool developers and graduate students. It requires a basic background in digital testing. The book can used as supplementary material for a graduate-level course on VLSI testing.

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You Can Find This Book In

Non-Fiction Engineering & Technology Electronics & Communications Engineering Electronics Engineering Circuits & Components Electronic Devices & Materials Semi-Conductors & Super-Conductors Computing & I.T.Computer Science Computer Architecture & Logic Design Energy Technology & Engineering Electrical Engineering

Graphical & Digital Media Applications Computer-Aided Design CAD

Foreword
Preface
Introduction	p. 1
Test Application Schemes for Testing Delay Defects	p. 7
Delay Fault Models	p. 23
Case Studies on Delay Testing	p. 33
Path Delay Fault Classification	p. 45
Delay Fault Simulation	p. 77
Test Generation for Path Delay Faults	p. 101
Design for Delay Fault Testability	p. 131
Synthesis for Delay Fault Testability	p. 157
Conclusions and Future Work	p. 169
References	p. 173
Index	p. 189
Table of Contents provided by Blackwell. All Rights Reserved.

Frontiers in Electronic Testing

At a Glance

Hardcover

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How to return your order

Defective items

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