Dependability in Electronic Systems

Mitigation of Hardware Failures, Soft Errors, and Electro-Magnetic Disturbances

By: Nobuyasu Kanekawa, Eishi H. Ibe, Takashi Suga

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Hardcover | 24 November 2010

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Hardcover
232 Pages

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23.5 x 15.88 x 1.91

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This book covers the practical application of dependable electronic systems in real industry, such as space, train control and automotive control systems, and network servers/routers. The impact from intermittent errors caused by environmental radiation (neutrons and alpha particles) and EMI (Electro-Magnetic Interference) are introduced together with their most advanced countermeasures. Power Integration is included as one of the most important bases of dependability in electronic systems. Fundamental technical background is provided, along with practical design examples. Readers will obtain an overall picture of dependability from failure causes to countermeasures for their relevant systems or products, and therefore, will be able to select the best choice for maximum dependability.

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You Can Find This Book In

Non-Fiction Engineering & Technology Electronics & Communications Engineering Electronics Engineering Circuits & Components Computing & I.T.Graphical & Digital Media Applications Computer-Aided Design CAD

Introduction	p. 1
Trends in Failure Cause and Countermeasure	p. 1
Contents and Organization of This Book	p. 3
For the Best Result	p. 5
References	p. 5
Terrestrial Neutron-Induced Failures in Semiconductor Devices and Relevant Systems and Their Mitigation Techniques	p. 7
Introduction	p. 7
SER in Memory Devices	p. 7
MCU in Memory Devices	p. 8
SET and MNU in Logic Devices	p. 8
Chip/System-Level SER Problem: SER Estimation and Mitigation	p. 9
Scope of This Chapter	p. 9
Basic Knowledge on Terrestrial Neutron-Induced Soft-Error in MOSFET Devices	p. 10
Cosmic Rays from the Outer Space	p. 10
Nuclear Spallation Reaction and Charge Collection in CMOSFET Device	p. 11
Experimental Techniques to Quantify Soft-Error Rate (SER) and Their Standardization	p. 12
The System to Quantify SER - SECIS	p. 12
Basic Method in JESD89A	p. 13
SEE Classification Techniques in Time Domain	p. 15
MCU Classification Techniques in Topological Space Domain	p. 16
Evolution of Multi-node Upset Problem	p. 17
MCU Characterization by Accelerator-Based Experiments	p. 17
Multi-coupled Bipolar Interaction (MCBI)	p. 21
Simulation Techniques for Neutron-Induced Soft Error	p. 23
Overall Microscopic Soft-Error Model	p. 23
Nuclear Spallation Reaction Models	p. 24
Charge Deposition Model	p. 24
SRAM Device Model	p. 26
Cell Matrix Model	p. 27
Recycle Simulation Method	p. 28
Validation of SRAM Model	p. 29
Prediction for Scaling Effects Down to 22 nm Design Rule in SRAMs	p. 29
Roadmap Assumption	p. 29
Results and Discussions	p. 30
Validity of Simulated Results	p. 39
SER Estimation in Devices/Components/System	p. 40
Standards for SER Measurement for Memories	p. 40
Revisions Needed for the Standards	p. 40
Quantification of SER in Logic Devices and Related Issues	p. 42
An Example of Chip/Board-Level SER Measurement and Architectural Mitigation Techniques	p. 43
SER Test Procedures for Network Components	p. 43
Results and Discussions	p. 49
Hierarchical Mitigation Strategies	p. 51
Basic Three Approaches	p. 51
Design on the Upper Bound (DOUB)	p. 52
Inter Layer Built-in Reliability (LABIR)	p. 56
Summary	p. 57
References	p. 59
Electromagnetic Compatibility	p. 65
Introduction	p. 65
Quantitative Estimation of the EMI Radiation Based on the Measured Near-Field Magnetic Distribution	p. 68
Measurement of the Magnetic Field Distribution Near the Circuit Board	p. 68
Calculation of the Electric Current Distribution on the Circuit Board	p. 68
Calculation of the Far-Field Radiated EMI	p. 70
Development of a Non-contact Current Distribution Measurement Technique for LSI Packaging on PCBs	p. 71
Electric Current Distribution Detection	p. 71
The Current Detection Result and Its Verification	p. 74
Reduction Technique of Radiated Emission from Chassis with PCB	p. 75
Far-Field Measurement of Chassis with PCB	p. 75
Measurements of Junction Current	p. 79
PSPICE Modeling	p. 80
Experimental Validation	p. 85
Chapter Summary	p. 86
References	p. 88
Power Integrity	p. 91
Introduction	p. 91
Detrimental Effect and Technical Trends of Power Integrity Design of Electronic Systems and Devices	p. 92
Detrimental Effect by Power Supply Noise on Semiconducting Devices	p. 92
Trends of Power Supply Voltage and Power Supply Current for CMOS Semiconducting Devices	p. 98
Trend of Power Distribution Network Design for Electronic Systems	p. 100
Design Methodology of Power Integrity	p. 102
Definition of Power Supply Noise in Electric System	p. 102
Time-Domain and Frequency-Domain Design Methodology	p. 104
Modeling and Design Methodologies of PDS	p. 115
Modeling of Electrical Circuit Parameters	p. 116
Design Strategies of PDS	p. 121
Simultaneous Switching Noise (SSN)	p. 125
Principle of SSN	p. 126
S-G loop SSN	p. 127
P-G loop SSN	p. 129
Measurement of Power Distribution System Performance	p. 131
On-Chip Voltage Waveform Measurement	p. 131
On-Chip Power Supply Impedance Measurement	p. 137
Summary	p. 140
References	p. 141
Fault-Tolerant System Technology	p. 143
Introduction	p. 143
Metrics for Dependability	p. 144
Reliability	p. 144
Availability	p. 145
Safety	p. 147
Reliability Paradox	p. 148
Survey on Fault-Tolerant Systems	p. 150
Technical Issues	p. 153
High Performance	p. 154
Transparency	p. 156
Physical Transparency	p. 156
Fault Tolerance of Fault Tolerance for Ultimate Safety	p. 157
Reliability of Software	p. 160
Industrial Approach	p. 161
Autonomous Decentralized Systems	p. 163
Space Application	p. 164
Commercial Fault-Tolerant Systems	p. 164
Ultra-Safe System	p. 165
Availability Improvement vs. Coverage Improvement	p. 166
Trade-Off Between Availability and Coverage - Stepwise Negotiating Voting	p. 166
Basic Concept	p. 166
Hiten Onboard Computer	p. 169
Fault-Tolerance Experiments	p. 170
Extension of SNV - Redundancy Management	p. 173
Coverage Improvement	p. 175
Self-Checking Comparator	p. 176
Optimal Time Diversity	p. 179
On-Chip Redundancy	p. 184
High Performance (Commercial Fault-Tolerant Computer)	p. 188
Basic Concepts of TPR Architecture	p. 188
System Configuration	p. 189
System Reconfiguration on Fault Occurrence	p. 191
Processing Take-Over on Fault Occurrence	p. 191
Fault Tolerance of Fault Tolerance	p. 192
Commercial Product Model	p. 195
Current Application Field: X-by-Wire	p. 196
References	p. 198
Challenges in the Future	p. 201
References	p. 202
Index	p. 203
Table of Contents provided by Ingram. All Rights Reserved.

Dependability in Electronic Systems

Mitigation of Hardware Failures, Soft Errors, and Electro-Magnetic Disturbances

At a Glance

Hardcover

Shipping

How to return your order

Defective items

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