Copper Interconnect Technology

Cover -- Contents -- 1 Introduction -- 1.1 Trends and Challenges -- 1.2 Physical Limits and Search for New Materials -- 1.3 Challenges -- 1.4 Choice of Materials -- 1.4.1 Why Copper (Cu) Interconnects? -- 1.5 New Technologies -- 1.5.1 Multilayer Metal Architecture -- 1.5.2 Substrate Engineering -- 1.6 An Alternate Technology for Interconnects -- 1.7 Materials Used in Modern Integrated Circuits -- 1.7.1 Properties of Copper -- 1.7.2 Grain Size -- 1.7.3 Melting Temperature -- 1.8 Barrier Layer -- 1.9 Low-K DielectricMaterials -- 1.10 Polymers -- 1.11 Semiconductors -- 1.11.1 Silicon (Si) -- 1.12 Challenges and Accomplishments -- 1.12.1 Challenges -- 1.12.2 Accomplishments -- 1.13 Technologies of the 21st Century, and the Plan to Meet the Challenges -- 1.14 Ultra-Shallow Junction (USJ) -- 1.15 Circuit Design and Architecture Improvements -- 1.16 Performance and Leakage in Low Standby Power (LSTP) Systems -- 1.17 Introduction of New Materials and Integration Processes -- 1.17.1 Nano-Materials -- 1.17.2 Superconductors -- 1.17.3 Integration Processes -- 1.18 Summary -- References -- 2 Dielectric Materials -- 2.1 Introduction -- 2.2 Interlayer Dielectric (ILD) -- 2.2.1 Introduction -- 2.2.2 Mathematical Model -- 2.2.3 Selection Criteria for an Ideal Low-K Material -- 2.2.4 Search for an Ideal Low-K Material -- 2.2.5 Achievement -- 2.2.6 Impact of Low-K ILD Materials on the Cu-Damascene Process -- 2.2.7 Deposition Techniques -- 2.3 High-K DielectricMaterials -- 2.3.1 Introduction -- 2.3.2 Impact on Scaling and Requirements -- 2.3.3 Search for a Suitable High-K Dielectric Material -- 2.3.4 Deposition Technology for High-K Materials -- 2.3.5 Summary -- References -- 3 Diffusion and Barrier Layers -- 3.1 Diffusion -- 3.1.1 Introduction -- 3.1.2 Transitional Effects -- 3.1.3 Mathematical Modeling of Diffusion in Cu-Interconnects -- 3.1.4 Grain Boundary (GB) Diffusion -- 3.1.5 Vacancy Diffusion -- 3.1.6 Drift Diffusion -- 3.1.7 Interdiffusion -- 3.1.8 Diffusion of Copper and Its Consequences -- 3.1.9 Precipitation -- 3.2 Barrier Layer for Cu-Interconnects -- 3.2.1 Theory -- 3.2.2 Ideal Barrier Layer -- 3.2.3 Barrier Layer Architecture -- 3.2.4 Interlayer Reactions -- 3.2.5 Influence of the Barrier Layer Properties on the Reliability of Cu-Interconnects -- 3.2.6 Low-K Dielectric-Barrier Layer -- 3.2.7 Reaction Rates -- 3.2.8 Influence of the Barrier Layer on the Electrical Conductivity of Cu-Lines -- 3.2.9 Influence of Barrier Layer Thermal Conductivity on Cu-Line -- 3.2.10 Classification of Barrier Layer -- 3.2.11 Properties of Different Barrier Layer Materials -- 3.2.12 Cap-Layer, Its Properties and Functions -- 3.3 Summary -- References -- 4 Pattern Generation -- 4.1 Photolithography -- 4.1.1 Introduction -- 4.1.2 Resolution Limits of Optical Lithography -- 4.1.3 Deep Ultraviolet (DUV) Lithography -- 4.1.4 Reticles -- 4.1.5 Enhancement Techniques for Resolution -- 4.1.6 157 nm Lithography -- 4.1.7 Chemically Amplified Resist (CA) -- 4.1.8 Extreme Ultraviolet (EUV) Lithography -- 4.1.9 e-Beam Lithography (EBL) -- 4.1.10 Electron-Beam Resist -- 4.1.11 e-Beam Reticle -- 4.1.12 Step and Flash Imprint Lithography (SFIL) -- 4.2 Etching and Cleaning of Damascene Structures -- 4.2.1 Etching -- 4.2.2 Cle.