Boundary-Scan Test

This new book will act as an introduction to as well as a practical guide to Boundary-Scan testing. The ever increasing miniaturization of digital electronic components is hampering the conventional testing of Printed Circuit Boards (PCBs) by means of bed-of-nails fixtures. Basically this is caused by the very high scale of integration of ICs, through which packages with hundreds of pins at very small pitches of down to a fraction of a millimeter, have become available. As a consequence, the trace distances between the copper tracks on a printed circuit board came down to the same value. Not only have the required small physical dimensions of the test nails made conventional testing unfeasible, the complexity to provide test signals for many hundreds of test nails has grown beyond manageable limits. A new board test methodology has to be invented. Following the evolution in the IC test technology, Boundary-Scan testing has become the new approach to PCB testing. By taking precautions in the design of the IC (design for testability), testing on a PCB level could be simplified to a great extent. This condition has been essential for the success of the introduction of a Boundary-Scan Test (BST) at board level. Since Boundary-Scan testing involves the whole PCB life cycle, it is more than just the introduction of a new design technology. It is an integral production approach which will aid top management in their goal of a successful global strategy for their business. This book will aid a company to introduce the Boundary-Scan Test. IC design and test engineers alike will find the book an important introduction and guide to using the Boundary-Scan Test in their work. Engineering managers can also use this book to gain an insight to the impact that the Boundary-Scan Test will make on their organisation.