Automated Technology for Verification and Analysis : 4th International Symposium, ATVA 2006, Beijing, China, October 23-26, 2006, Proceedings - Susanne Graf

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Automated Technology for Verification and Analysis

4th International Symposium, ATVA 2006, Beijing, China, October 23-26, 2006, Proceedings

By: Susanne Graf (Editor), Wenhui Zhang (Editor)

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Paperback | 10 October 2006

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The Automated Technology for Veri?cation and Analysis (ATVA) international symposium series was initiated in 2003, responding to a growing interest in formal veri?cation spurred by the booming IT industry, particularly hardware design and manufacturing in East Asia. Its purpose is to promote research on automated veri?cation and analysis in the region by providing a forum for int- action between the regional and the international research/industrial commu- ties of the ?eld. ATVA 2006, the fourth of the ATVA series, was held in Beijing, China, October 23-26, 2006. The main topics of the symposium include th- ries useful for providing designers with automated support for obtaining correct software or hardware systems, as well as the implementation of such theories in tools or their application. This year, we received a record number of papers: a total of 137 submissions from 27 countries. Each submission was assigned to three Program Comm- tee members, who could request help from subreviewers, for rigorous and fair evaluation. The ?nal deliberation by the Program Committee was conducted through Springer's Online Conference Service for a duration of about 10 days after nearly all review reports had been collected. In the end, 35 papers were selected for inclusion in the program. ATVA 2006 had three keynote speeches given respectively by Thomas Ball, Jin Yang, and Mihalis Yannakakis. The main symposium was preceded by a tutorial day, consisting of three two-hourlectures given by the keynotespeakers.

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You Can Find This Book In

Non-Fiction Computing & I.T.Computer Science Artificial Intelligence Computer Architecture & Logic Design Computer Networking & Communications Systems Analysis & Design Graphical & Digital Media Applications Computer-Aided Design CAD Computer Programming & Software Development Programming & Scripting Languages Computer Hardware

Network Hardware

Analysis of recursive probabilistc models	p. 1
Verification challenges and opportunities in the new era of microprocessor design	p. 6
Automated abstraction of software	p. 8
Symmetry reduction for probabilistic model checking using generic representatives	p. 9
Eager Markov chains	p. 24
A probabilistic learning approach for counterexample guided abstraction refinement	p. 39
A fine-grained fullness-guided chaining heuristic for symbolic reachability analysis	p. 51
Model checking timed systems with urgencies	p. 67
Whodunit? : causal analysis for counterexamples	p. 82
On the membership problem for visibly pushdown languages	p. 96
On the construction of fine automata for safety properties	p. 110
On the succinctness of nondeterminism	p. 125
Efficient algorithms for alternating pushdown systems with an application to the computation of certificate chains	p. 141
Compositional reasoning for hardware/software co-verification	p. 154
Learning-based symbolic assume-guarantee reasoning with automatic decomposition	p. 170
On the satisfiability of modular arithmetic formulae	p. 186
Selective approaches for solving weak games	p. 200
Controller synthesis and ordinal automata	p. 215
Effective contraction of timed STGs for decomposition based timed circuit synthesis	p. 229
Synthesis for probabilistic environments	p. 245
Branching-time property preservation between real-time systems	p. 260
Automatic verification of hybrid systems with large discrete state space	p. 276
Timed unfoldings for networks of timed automata	p. 292
Symbolic unfoldings for networks of timed automata	p. 307
Ranked predicate abstraction for branching time : complete, incremental, and precise	p. 322
Timed temporal logics for abstracting transient states	p. 337
Predicate abstraction of programs with non-linear computation	p. 352
A fresh look at testing for asynchronous communication	p. 369
Proactive leader election in asynchronous shared memory systems	p. 384
A semantic framework for test coverage	p. 399
Monotonic set-extended prefix rewriting and verification of recursive ping-pong protocols	p. 415
Analyzing security protocols in hierarchiral networks	p. 430
Functional analysis of a real-time protocol for networked control systems	p. 446
Symbolic semantics for the verification of security properties of mobile petri nets	p. 461
Sigref - a symbolic bisimulation tool box	p. 477
Towards a model-checker for counter systems	p. 493
The implementation of Mazurkiewicz traces in POEM	p. 508
Model-based tool-chain infrastructure for automated analysis of embedded systems	p. 523
Table of Contents provided by Blackwell. All Rights Reserved.

Automated Technology for Verification and Analysis

4th International Symposium, ATVA 2006, Beijing, China, October 23-26, 2006, Proceedings

At a Glance

Paperback

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