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UTLEON3 : Exploring Fine-Grain Multi-Threading in FPGAs - Martin Dan?k

UTLEON3

Exploring Fine-Grain Multi-Threading in FPGAs

By: Martin Dan?k, Leoš Kafka, Lukáš Kohout, Jaroslav Sýkora, Roman Bartosi?ski

eText | 20 October 2012

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This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs.

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