The SECD Microprocessor : A Verification Case Study

A Verification Case Study

By: Brian T. Graham

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Hardcover | 1 December 2009

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196 Pages

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23.39 x 15.6 x 1.27

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This is a milestone in machine-assisted microprocessor verification. Gordon [20] and Hunt [32] led the way with their verifications of sim ple designs, Cohn [12, 13] followed this with the verification of parts of the VIPER microprocessor. This work illustrates how much these, and other, pioneers achieved in developing tractable models, scalable tools, and a robust methodology. A condensed review of previous re search, emphasising the behavioural model underlying this style of verification is followed by a careful, and remarkably readable, ac count of the SECD architecture, its formalisation, and a report on the organisation and execution of the automated correctness proof in HOL. This monograph reports on Graham's MSc project, demonstrat ing that - in the right hands - the tools and methodology for formal verification can (and therefore should?) now be applied by someone with little previous expertise in formal methods, to verify a non-trivial microprocessor in a limited timescale. This is not to belittle Graham's achievement; the production of this proof, work ing as Graham did from the previous literature, goes well beyond a typical MSc project. The achievement is that, with this exposition to hand, an engineer tackling the verification of similar microprocessor designs will have a clear view of the milestones that must be passed on the way, and of the methods to be applied to achieve them.

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Non-Fiction Computing & I.T.Computer Science Systems Analysis & Design Engineering & Technology Electronics & Communications Engineering Electronics Engineering Circuits & Components Electronic Devices & Materials Microprocessors Artificial Intelligence Energy Technology & Engineering

Electrical Engineering Graphical & Digital Media Applications

Foreword
Preface
Formal Methods and Verification	p. 1
Achievements in Hardware Verification	p. 3
The HOL System	p. 4
LispKit and the SECD Architecture	p. 9
The Syntax of LispKit	p. 10
The Interpretation of LispKit	p. 13
SECD Architecture	p. 23
LispKit to SECD Machine Cods	p. 27
Summary	p. 31
SECD Architecture: Silicon Synthesis	p. 33
Project Context	p. 33
Levels of the Design	p. 34
The Chip Interface	p. 36
Internal Architecture and Microcode	p. 38
The Final Layout	p. 51
Summary and Status	p. 53
Formal Specification of the SECD Design	p. 57
Modelling Hardware	p. 59
The Top Level Specification	p. 60
The Low Level Definition	p. 70
Register Transfer Level Specification	p. 73
Relating the Levels	p. 93
Summary	p. 97
Verification of the SECD Design	p. 101
Constraints	p. 102
Structure of the Proof	p. 109
Unfolding the System Definition	p. 111
Phase Stage: Effect of Each Microinstruction	p. 117
Microprogramming Stage: Symbolic Execution	p. 120
Liveness	p. 135
Computations across abstraction	p. 137
Summary	p. 153
Denouement	p. 157
Putting the Proof Result into Context	p. 159
Retrospective Improvements	p. 163
Hardware Verification	p. 165
Bibliography	p. 169
Index	p. 175
Table of Contents provided by Blackwell. All Rights Reserved.

The SECD Microprocessor : A Verification Case Study

A Verification Case Study

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