Reconfigurable Computing

Accelerating Computation with Field-Programmable Gate Arrays

By: Maya B. Gokhale, Paul S. Graham

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Hardcover | 14 December 2005

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Hardcover
252 Pages

Dimensions(cm)
23.39 x 15.6 x 1.6

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This volume is unique: the first comprehensive exposition of the exciting new field of Reconfigurable Computing with FPGAs. By mapping algorithms directly into programmable logic, FPGA accelerators offer and deliver 10X-100X performance increases over microprocessors for a large range of application domains. Reconfigurable computing is found in virtually every computing milieu, from satellites to supercomputers. By loading new hardware circuits onto the FPGA, or even modifying parts of the circuit during operation, reconfigurable computers achieve performance rivaling application-specific integrated circuits (ASICs), yet are built from commodity parts.

The authors are among the originators of Reconfigurable Computing and are recognized leaders in the field. Drawing on their deep familiarity with RC, they survey every aspect of the field, from FPGA device architecture, reconfigurable systems architectures, programming languages and compilation tools to the application domains of signal processing, image processing, network security, bioinformatics, and supercomputing. Although citations to original sources are abundant, nevertheless, the book is accessible to the science and technology practitioner and student.

Reconfigurable Computing is of especially topical to computer science and engineering researchers as well as professionals in high performance computing and embedded computing.

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An Introduction to Reconfigurable Computing	p. 1
What is RC?	p. 1
RC Architectures	p. 3
How did RC originate?	p. 4
Inside the FPGA	p. 6
Mapping Algorithms to Hardware	p. 7
RC Applications	p. 8
Example: Dot Product	p. 9
Further Reading	p. 10
Reconfigurable Logic Devices	p. 11
Field-Programmable Gate Arrays	p. 12
Basic Architecture	p. 12
Specialized Function Blocks	p. 22
Programming Architecture	p. 26
Coarse-Grained Reconfigurable Arrays	p. 28
Raw	p. 29
PipeRench	p. 30
RaPiD	p. 32
PACT XPP	p. 33
MathStar	p. 35
Summary	p. 36
Reconfigurable Computing Systems	p. 37
Parallel Processing on Reconfigurable Computers	p. 37
Instruction Level Parallelism	p. 37
Task Level Parallelism	p. 39
A Survey of Reconfigurable Computing Systems	p. 41
I/O Bus Accelerator	p. 43
Massively Parallel FPGA array	p. 45
Reconfigurable Supercomputer	p. 45
Reconfigurable Logic Co-processor	p. 47
Summary	p. 49
Language and Compilation	p. 51
Design Cycle	p. 51
Languages	p. 54
Algorithmic RC Languages	p. 55
Hardware Description Languages (HDL)	p. 57
High Level Compilation	p. 60
Compiler Phases	p. 65
Analysis and Optimizations	p. 66
Scheduling	p. 67
Low Level Design Flow	p. 68
Logic Synthesis	p. 69
Technology Mapping	p. 70
Logic Placement	p. 71
Signal Routing	p. 72
Configuration Bitstreams	p. 73
Debugging Reconfigurable Computing Applications	p. 74
Basic Needs for Debugging	p. 74
Debugging Facilities	p. 75
Challenges for RC Application Debugging	p. 84
Summary	p. 85
Signal Processing Applications	p. 87
What is Digital Signal Processing?	p. 87
Why Use Reconfigurable Computing for DSP?	p. 89
Reconfigurable Computing's Suitability for DSP	p. 89
Comparing DSP Implementation Technologies	p. 92
DSP Application Building Blocks	p. 96
Basic Operations and Elements	p. 97
Filtering	p. 102
Transforms	p. 103
Example DSP Applications	p. 108
Beamforming	p. 108
Software Radio	p. 112
Summary	p. 117
Image Processing	p. 119
RC for Image and Video Processing	p. 119
Local Neighborhood Functions	p. 121
Cellular Arrays for Pixel Parallelism	p. 123
Image Pipelines for Instruction-Level Parallelism	p. 123
Convolution	p. 124
Morphology	p. 125
Feature Extraction	p. 127
Automatic Target Recognition	p. 129
Image Matching	p. 131
Evolutionary Image Processing	p. 134
Summary	p. 139
Network Security	p. 141
Cryptographic Applications	p. 141
Cryptography Basics	p. 142
RC Cryptographic Algorithm Implementations	p. 146
Network Protocol Security	p. 148
RC Network Interface	p. 148
Security Protocols	p. 151
Network Defense	p. 152
Summary	p. 155
Bioinformatics Applications	p. 157
Introduction	p. 157
Applications	p. 159
Genome Assembly	p. 159
Content-Based Search	p. 160
Genome Comparison	p. 160
Molecular Phylogeny	p. 161
Pattern Matching	p. 161
Protein Domain Databases	p. 162
Dynamic Programming Algorithms	p. 163
Alignments	p. 163
Dynamic Programming Equations	p. 164
Gap Functions	p. 166
Systolic DP Computation	p. 166
Backtracking	p. 167
Modulo Encoding	p. 169
FPGA Implementations	p. 170
Seed-Based Heuristics	p. 170
Filtering, Heuristics, and Quality Values	p. 171
BLAST : a 3-Stages Heuristic	p. 171
Seed Indexing	p. 172
FPGA Implementations	p. 174
Profiles, HMMs and Language Models	p. 174
Position-Dependent Profiles	p. 174
Hidden Markov Models	p. 175
Language Models	p. 176
Bioinformatics FPGA Accelerators	p. 177
Splash	p. 178
Perle	p. 178
GenStorm	p. 178
RDisk	p. 178
BioXL/H	p. 181
DeCypher	p. 181
Summary	p. 181
Supercomputing Applications	p. 183
Introduction	p. 183
Monte Carlo Simulation of Radiative Heat Transfer	p. 184
Algorithm Description	p. 185
Hardware Implementation	p. 187
Performance	p. 188
Urban Road Traffic Simulation	p. 192
CA Traffic Modeling	p. 193
Intersections and Global Behavior	p. 194
Constructive Approach	p. 196
Streaming Approach	p. 198
Summary	p. 202
References	p. 205
Index	p. 233
Table of Contents provided by Ingram. All Rights Reserved.

Reconfigurable Computing

Accelerating Computation with Field-Programmable Gate Arrays

At a Glance

Hardcover

Shipping

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