Morphological Image Processing

Architecture and VLSI Design

By: Petrus Paulus Jonker, P. P. Jonker, Pieter Jonker

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Paperback | 31 January 1993

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308 Pages

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24.77 x 16.51 x 2.54

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This book describes image processing research based on the morphology of the objects in an image and a VLSI design of a Cellular Logic Processing Element for a real-time processor pipeline.
The field of image processing has spawned a number of special parallel computer architectures: the Square (SIMD), Processor Array, the Pyramid, the Linear Processor Array (or scan line array) and the Processor Pipeline. This book features a classification of low-level image processing operations, reviews some intermediate level algorithms, and gives a short introduction into computer architecture used for image and digital signal processing. Morphology-based processing images is introduced by treating cellular logic operations such as skeletonization as hit-or-miss transformations. This approach can be extended to images of higher dimensions than two and a method is described to construct hit-or-miss masks for the skeletonization of these images.
In the second part of the book a study is performed on the speed bottlenecks that can be found in the main architectural groups followed by the description of a method for the structured design of integrated, digital hardware.
The VLSI design of a CMOS Processing Element for the real-time processing of binary images and the board level design of a scalable processor pipeline for a real-time low-level processing of grey value images is described in detail.
Finally, a computer architecture for low and intermediate processing of two and three dimensional images if proposed.

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You Can Find This Book In

Non-Fiction Engineering & Technology Electronics & Communications Engineering Electronics Engineering Circuits & Components Arts & Entertainment Architecture Architectural Structure & Design Computing & I.T.Computer Science Image Processing Other Technologies & Applied Sciences

Applied Optics Energy Technology & Engineering Electrical Engineering Graphical & Digital Media Applications

Summary	p. 1
Table of Contents	p. 3
List of Symbols	p. 8
Introduction	p. 11
Image processing algorithms	p. 19
Image processing tasks	p. 19
Low-level image processing operations	p. 22
Description of some intermediate level operations	p. 33
Requirements for image processor architectures	p. 41
Image processing architectures	p. 43
Classifications of architectures	p. 43
Uni- and Multi-processors	p. 48
MIMD systems	p. 52
SIMD systems	p. 54
Pipelines	p. 57
Morphology based image processing	p. 67
Cellular logic processing	p. 69
Conditions for multi-dimensional thinning	p. 89
Pipelined low level image processing	p. 131
Devices for cellular logic processing	p. 132
Design aspects of real-time low-level image processors	p. 142
A design method for special architectures	p. 171
The architecture of a Cellular Logic Processing Element	p. 184
A real-time pipeline for low level image processing	p. 214
Toward an architecture for low- and inter-mediate level 2D and 3D image processing	p. 227
Design aspects of a 3D image processing architecture	p. 227
Design aspects of an intermediate level image processing architecture	p. 230
General design considerations	p. 241
Draft architecture and description of constituting parts	p. 244
Implementation of low-level 2D Operations	p. 252
Implementation of low-level 3D Operations	p. 254
Intermediate level algorithms	p. 259
Conclusions	p. 263
References	p. 269
Samenvatting	p. 285
Appendix A	p. 287
Maskset for thinning in 2D (a)	p. 287
Maskset for thinning in 2D (b)	p. 288
Maskset for thinning in 3D	p. 289
Appendix B	p. 291
Appendix C	p. 292
Acknowledgements	p. 295
Curriculum Vitae	p. 297
Table of Contents provided by Blackwell. All Rights Reserved.

Morphological Image Processing

Architecture and VLSI Design

At a Glance

Paperback

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