Memory Architecture Exploration for Programmable Embedded Systems

By: Peter Grun, Nikil D. Dutt, Alexandru Nicolau

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Hardcover | 31 December 2002

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156 Pages

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23.5 x 15.88 x 1.91

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Memory Architecture Exploration for Programmable Embedded Systems addresses efficient exploration of alternative memory architectures, assisted by a "compiler-in-the-loop" that allows effective matching of the target application to the processor-memory architecture. This new approach for memory architecture exploration replaces the traditional black-box view of the memory system and allows for aggressive co-optimization of the programmable processor together with a customized memory system.
The book concludes with a set of experiments demonstrating the utility of this exploration approach. The authors perform architecture and compiler exploration for a set of large, real-life benchmarks, uncovering promising memory configurations from different perspectives, such as cost, performance and power.

Industry Reviews

From the reviews:

"This book considers the opportunities and discusses the challenges in designing embedded memory system ... . The book is well organized, up-to-date and easy to follow for self-study. ... In general the book has high educational value. ... The book is really interesting both for specialists in the topic, and graduate students ... . The reviewer rates this book highly and recommends it to graduate students, researchers and practicing engineers in embedded systems design. Overall, the authors have done a commendable job ... ." (Mile Stojcev, Microelectronics Reliability, Vol. 47, 2004)

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You Can Find This Book In

Non-Fiction Engineering & Technology Electronics & Communications Engineering Electronics Engineering Automatic Control Engineering Electronic Devices & Materials Semi-Conductors & Super-Conductors Computing & I.T.Computer Science Computer Architecture & Logic Design Systems Analysis & Design Graphical & Digital Media Applications

Energy Technology & Engineering Electrical Engineering Circuits & Components Computer Hardware

List of Figures	p. ix
List of Tables	p. xiii
Preface	p. xv
Acknowledgments
Introduction	p. 1
Motivation	p. 1
Memory Architecture Exploration for Embedded Systems	p. 2
Book Organization	p. 7
Related Work	p. 9
High-Level Synthesis	p. 9
Cache Optimizations	p. 10
Computer Architecture	p. 11
Disk File Systems	p. 12
Heterogeneous Memory Architectures	p. 13
Network Processors	p. 14
Other Memory Architecture Examples	p. 15
Summary	p. 16
Early Memory Size Estimation	p. 17
Motivation	p. 17
Memory Estimation Problem	p. 18
Memory Size Estimation Algorithm	p. 20
Data-dependence analysis	p. 22
Computing the memory size between loop nests	p. 23
Determining the bounding rectangles	p. 23
Determining the memory size range	p. 24
Improving the estimation accuracy	p. 25
Discussion on Parallelism vs. Memory Size	p. 25
Experiments	p. 27
Related Work	p. 28
Summary	p. 29
Early Memory and Connectivity Architecture Exploration	p. 31
Motivation	p. 31
Access Pattern Based Memory Architecture Exploration	p. 32
Our approach	p. 32
Illustrative example	p. 34
The Access Pattern based Memory Exploration (APEX) Approach	p. 37
Access Pattern Clustering	p. 37
Exploring Custom Memory Configurations	p. 39
Experiments	p. 39
Experimental Setup	p. 40
Results	p. 41
Related Work	p. 45
Connectivity Architecture Exploration	p. 46
Our approach	p. 47
Illustrative example	p. 48
Connectivity Exploration Algorithm	p. 51
Cost, performance, and power models	p. 55
Coupled Memory/Connectivity Exploration strategy	p. 57
Experiments	p. 59
Experimental Setup	p. 59
Results	p. 60
Related Work	p. 72
Discussion on Memory Architecture	p. 74
Summary and Status	p. 75
Memory-Aware Compilation	p. 79
Motivation	p. 79
Memory Timing Extraction for Efficient Access Modes	p. 80
Motivating Example	p. 81
Our Approach	p. 83
TIMGEN: Timing extraction algorithm	p. 84
Experiments	p. 89
Experimental Setup	p. 89
Results	p. 90
Related Work	p. 92
Memory Miss Traffic Management	p. 94
Illustrative example	p. 95
Miss Traffic Optimization Algorithm	p. 98
Experiments	p. 101
Experimental setup	p. 102
Results	p. 102
Related Work	p. 105
Summary	p. 107
Experiments	p. 109
Experimental setup	p. 109
Results	p. 110
The Compress Data Compression Application	p. 110
The Li Lisp Interpreter Application	p. 114
The Vocoder Voice Coding Application	p. 116
Summary of Experiments	p. 117
Conclusions	p. 119
Summary of Contributions	p. 119
Future Directions	p. 120
References	p. 121
Index	p. 127
Table of Contents provided by Syndetics. All Rights Reserved.

Memory Architecture Exploration for Programmable Embedded Systems

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Hardcover

Industry Reviews

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