ABOUT THE EDITORS xi
PREFACE xiii
CHAPTER 1 BASIC SPINTRONIC TRANSPORT PHENOMENA 1
Nicolas Locatelli and Vincent Cros
1.1 Giant Magnetoresistance 2
1.2 Tunneling Magnetoresistance 9
1.3 The Spin-Transfer Phenomenon 20
CHAPTER 2 MAGNETIC PROPERTIES OF MATERIALS FOR MRAM 29
Shinji Yuasa
2.1 Magnetic Tunnel Junctions for MRAM 29
2.2 Magnetic Materials and Magnetic Properties 31
2.3 Basic Materials and Magnetotransport Properties 39
CHAPTER 3 MICROMAGNETISM APPLIED TO MAGNETIC NANOSTRUCTURES 55
Liliana D. Buda-Prejbeanu
3.1 Micromagnetic Theory: From Basic Concepts Toward the Equations 55
3.2 Micromagnetic Configurations in Magnetic Circular Dots 67
3.3 STT-Induced Magnetization Switching: Comparison of Macrospin and Micromagnetism 70
3.4 Example of Magnetization Precessional STT Switching: Role of Dipolar Coupling 73
CHAPTER 4 MAGNETIZATION DYNAMICS 79
William E. Bailey
4.1 Landau-Lifshitz-Gilbert Equation 79
4.2 Small-Angle Magnetization Dynamics 84
4.3 Large-Angle Dynamics: Switching 90
4.4 Magnetization Switching by Spin-Transfer 95
CHAPTER 5 MAGNETIC RANDOM-ACCESS MEMORY 101
Bernard Dieny and I. Lucian Prejbeanu
5.1 Introduction to Magnetic Random-Access Memory (MRAM) 101
5.2 Storage Function: MRAM Retention 104
5.3 Read Function 110
5.4 Field-Written MRAM (FIMS-MRAM) 112
5.5 Spin-Transfer Torque MRAM (STT-MRAM) 118
5.6 Thermally-Assisted MRAM (TA-MRAM) 135
5.7 Three-Terminal MRAM Devices 150
5.8 Comparison of MRAM with Other Nonvolatile Memory Technologies 153
5.9 Conclusion 157
CHAPTER 6 MAGNETIC BACK-END TECHNOLOGY 165
Michael C. Gaidis
6.1 Magnetoresistive Random-Access Memory (MRAM) Basics 165
6.2 MRAM Back-End-of-Line Structures 166
6.3 MRAM Process Integration 169
6.4 Process Characterization 187
CHAPTER 7 BEYOND MRAM: NONVOLATILE LOGIC-IN-MEMORY VLSI 199
Takahiro Hanyu, Tetsuo Endoh, Shoji Ikeda, Tadahiko Sugibayashi, Naoki Kasai, Daisuke Suzuki, Masanori Natsui, Hiroki Koike, and Hideo Ohno
7.1 Introduction 199
7.2 Nonvolatile Logic-in-Memory Architecture 203
7.3 Circuit Scheme for Logic-in-Memory Architecture Based on Magnetic Flip-Flop Circuits 209
7.4 Nonvolatile Full Adder Using MTJ Devices in Combination with MOS Transistors 214
7.5 Content-Addressable Memory 217
7.6 MTJ-based Nonvolatile Field-Programmable Gate Array 224
APPENDIX 231
INDEX 233