Embedded Systems

Composable and Predictable Systems

By: Andreas Hansson, Kees Goossens

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Hardcover | 28 October 2010

At a Glance

Hardcover
220 Pages

Dimensions(cm)
23.5 x 16.51 x 1.91

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$249.00

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The book provides a comprehensive description and implementation methodology for the Philips/NXP Aethereal/aelite Network-on-Chip (NoC). The presentation offers a systems perspective, starting from the system requirements and deriving and describing the resulting hardware architectures, embedded software, and accompanying design flow. Readers get an in depth view of the interconnect requirements, not centered only on performance and scalability, but also the multi-faceted, application-driven requirements, in particular composability and predictability. The book shows how these qualitative requirements are implemented in a state-of-the-art on-chip interconnect, and presents the realistic, quantitative costs.

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Introduction	p. 1
Trends	p. 1
Application Requirements	p. 1
Implementation and Design	p. 3
Time and Cost	p. 4
Summary	p. 5
Example System	p. 6
Requirements	p. 9
Scalability	p. 10
Diversity	p. 10
Composability	p. 11
Predictability	p. 13
Reconfigurability	p. 14
Automation	p. 15
Key Components	p. 16
Organisation	p. 18
Proposed Solution	p. 19
Architecture Overview	p. 19
Contention-Free Routing	p. 21
Scalability	p. 22
Physical Scalability	p. 23
Architectural Scalability	p. 23
Diversity	p. 24
Network Stack	p. 25
Streaming Stack	p. 25
Memory-Mapped Stack	p. 26
Composability	p. 28
Resource Flow-Control Scheme	p. 28
Flow Control and Arbitration Granularities	p. 29
Arbitration Unit Size	p. 32
Temporal Interference	p. 32
Summary	p. 33
Predictability	p. 33
Architecture Behaviour	p. 34
Modelling and Analysis	p. 34
Reconfigurability	p. 35
Spatial and Temporal Granularity	p. 35
Architectural Support	p. 37
Automation	p. 37
Input and Output	p. 38
Division into Tools	p. 38
Conclusions	p. 39
Dimensioning	p. 41
Local Buses	p. 41
Target Bus	p. 41
Initiator Bus	p. 44
Atomisers	p. 46
Limitations	p. 47
Protocol Shells	p. 47
Limitations	p. 49
Clock Domain Crossings	p. 49
Network Interfaces	p. 50
Architecture	p. 51
Experimental Results	p. 54
Limitations	p. 55
Routers	p. 56
Experimental Results	p. 58
Limitations	p. 60
Mesochronous Links	p. 60
Experimental Results	p. 62
Limitations	p. 62
Control Infrastructure	p. 62
Unified Control and Data	p. 63
Architectural Components	p. 64
Limitations	p. 67
Conclusions	p. 67
Allocation	p. 69
Sharing Slots	p. 73
Problem Formulation	p. 76
Application Specification	p. 76
Network Topology Specification	p. 79
Allocation Specification	p. 81
Residual Resource Specification	p. 82
Allocation Algorithm	p. 84
Channel Traversal Order	p. 85
Speculative Reservation	p. 86
Path Selection	p. 89
Refinement of Mapping	p. 93
Slot Allocation	p. 93
Resource Reservation	p. 97
Limitations	p. 98
Experimental Results	p. 99
Conclusions	p. 101
Instantiation	p. 103
Hardware	p. 104
SystemC Model	p. 105
RTL Implementation	p. 106
Allocations	p. 107
Run-Time Library	p. 108
Initialisation	p. 109
Opening a Connection	p. 111
Closing a Connection	p. 113
Temporal Bounds	p. 115
Experimental Results	p. 115
Setup Time	p. 116
Memory Requirements	p. 117
Tear-Down Time	p. 118
Conclusions	p. 119
Verification	p. 121
Problem Formulation	p. 124
Cyclo-static Dataflow (CSDF) Graphs	p. 125
Buffer Capacity Computation	p. 127
Network Requirements	p. 128
Network Behaviour	p. 129
Slot Table Injection	p. 129
Header Insertion	p. 130
Path Latency	p. 131
Return of Credits	p. 131
Channel Model	p. 132
Fixed Latency	p. 132
Split Latency and Rate	p. 134
Split Data and Credits	p. 134
Final Model	p. 134
Shell Model	p. 135
Buffer Sizing	p. 135
Modelling the Application	p. 136
Synthetic Benchmarks	p. 137
Mobile Phone SoC	p. 139
Set-Top Box SoC	p. 139
Conclusions	p. 140
FPGA Case Study	p. 143
Hardware Platform	p. 144
Host Tile	p. 145
Processor Tiles	p. 146
Software Platform	p. 147
Application Middleware	p. 147
Design Flow	p. 148
Application Mapping	p. 149
Performance Verification	p. 151
Soft Real-Time	p. 151
Firm Real-Time	p. 152
Conclusions	p. 154
ASIC Case Study	p. 157
Digital TV	p. 157
Experimental Results	p. 159
Scalability Analysis	p. 162
Automotive Radio	p. 165
Experimental Results	p. 166
Scalability Analysis	p. 167
Conclusions	p. 168
Related Work	p. 171
Scalability	p. 171
Physical Scalability	p. 171
Architectural Scalability	p. 172
Diversity	p. 173
Composability	p. 174
Level of Composability	p. 175
Enforcement Mechanism	p. 175
Interference	p. 176
Predictability	p. 177
Enforcement Mechanism	p. 177
Resource Allocation	p. 177
Analysis Method	p. 178
Reconfigurability	p. 178
Automation	p. 179
Conclusions and Future Work	p. 181
Conclusions	p. 181
Future Work	p. 183
Example Specification	p. 185
Architecture	p. 186
Communication	p. 187
References	p. 191
Glossary	p. 201
Index	p. 205
Table of Contents provided by Ingram. All Rights Reserved.

Embedded Systems

Composable and Predictable Systems

At a Glance

Hardcover

Shipping

How to return your order

Defective items

You Can Find This Book In

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