Intel Xeon Phi Coprocessor High Performance Programming

By: James Jeffers, James Reinders

Write A Review

eText | 11 February 2013 | Edition Number 1

At a Glance

ePUB
432 Pages

eText

$70.95

or 4 interest-free payments of $17.74 with

Instant online reading in your Booktopia eTextbook Library *

Why choose an eTextbook?

Instant Access *

Purchase and read your book immediately

Read Aloud

Listen and follow along as Bookshelf reads to you

Study Tools

Built-in study tools like highlights and more

* eTextbooks are not downloadable to your eReader or an app and can be accessed via web browsers only. You must be connected to the internet and have no technical issues with your device or browser that could prevent the eTextbook from operating.

Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products.

This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture.

A practical guide to the essentials of the Intel Xeon Phi coprocessor
Presents best practices for portable, high-performance computing and a familiar and proven threaded, scalar-vector programming model
Includes simple but informative code examples that explain the unique aspects of this new highly parallel and high performance computational product
Covers wide vectors, many cores, many threads and high bandwidth cache/memory architecture