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Wave Pipelining : Theory and CMOS Implementation - C. Thomas Gray

Wave Pipelining

Theory and CMOS Implementation

Hardcover Published: 30th November 1993
ISBN: 9780792393986
Number Of Pages: 206

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Wave Pipelining: Theory and CMOS Implementation provides a coherent presentation of the theory of wave pipelined operation of digital circuits and discusses practical design techniques for the realization of wave pipelined circuits in CMOS technology.
Wave pipeling is a timing methodology used in digital systems to enhance performance while conserving the number of data registers used. This is achieved by applying new data to the inputs of a combinatorial logic block before the previous outputs are available. In contrast to conventional pipelining, system performance is limited by differences in maximum and minimum circuit delay rather than maximum circuit delays. Realization of practical systems using this technique requires accurate system level and circuit level timing analysis. At the system level, timing constraints identifying valid regions of operation for correct clocking of wave pipelined circuits are presented. Both single stage and multiple stage systems including feedback are considered.
At the circuit level, since performance is determined by the maximum circuit delay difference, highly accurate estimates of both maximum and minimum delays are needed. Thus, timing analysis based on traditional gate delay models is not sufficient. For CMOS circuits, data dependent delay models considering the effect of simultaneous multiple input switchings must be used. An algorithm using these delay models for accurate analysis of small to medium sized circuits is implemented in a prototype timing analyzer, XTV. Results are given for a set of benchmark circuits.

List of Figures
List of Tables
Preface
Introduction and Motivationp. 1
Wave Pipeliningp. 2
Historyp. 6
Designing Wave Pipelined Circuitsp. 8
Organizationp. 10
Clock Period Constraints: Single Stage Systemsp. 13
System Modelp. 16
Constraints for Correct Clockingp. 19
Minimizing the Clock Periodp. 30
The Parameter kp. 33
Special Casesp. 39
Clock Period Constraints: Multiple Stage Systemsp. 45
System Modelp. 46
Constraints for Correct Clockingp. 48
Examplep. 57
Exact Timing Analysisp. 61
Motivation and Justificationp. 63
Complexity of Problemp. 76
Notation and Modelp. 78
Basic Algorithm Developmentp. 83
Exact Timing Analysis: Algorithmp. 87
Algorithm Strategyp. 88
Calculation of Output Responsesp. 88
Verification of Output Responsesp. 92
Detection of Componentsp. 102
Vector Reportingp. 103
Implementationp. 104
Limitations and Extensionsp. 113
Practical Considerations in Wave Pipeliningp. 125
Architecture Choicep. 126
Path Delay Variationp. 127
Circuit Choicep. 128
Parametric Variations due to Manufacturing and Environmental Factorsp. 132
Clock Distribution and Physical Layoutp. 134
Technology Scalingp. 136
Design Examplesp. 139
Parallel-Carry Adderp. 140
Samplerp. 160
Conclusionsp. 183
A Example Model Filep. 187
B Calculation of Tolerance of Parametric Variationsp. 191
Referencesp. 195
Indexp. 205
Table of Contents provided by Blackwell. All Rights Reserved.

ISBN: 9780792393986
ISBN-10: 0792393988
Series: The Springer International Series in Engineering and Computer Science
Audience: Professional
Format: Hardcover
Language: English
Number Of Pages: 206
Published: 30th November 1993
Publisher: Springer
Country of Publication: NL
Dimensions (cm): 23.5 x 15.5  x 1.42
Weight (kg): 1.1