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VLSI : Integrated Systems on Silicon :  Integrated Systems on Silicon - Ricardo A. Reis

VLSI : Integrated Systems on Silicon

Integrated Systems on Silicon

Hardcover Published: December 2009
ISBN: 9780412823701
Number Of Pages: 570

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VLSI (very large scale integration) technology is evolving to the point where complete systems are being integrated on a single chip, including ASICs, embedded processing, hardware and software control, analog and digital signal processing, sensors and actuators. In addition there is a demand for many systems to be compact, portable, with wireless communication, efficient production and low battery power operation. This book presents novel developments addressing the conception, design, CAD and realization of such new systems. Among the important issues presented are: VLSI systems on a chip; electronic design automation; ultra low voltage and low power; automatic synthesis; VLSI applications. The book comprises the selected proceedings of the International Conference on Very Large Scale Integration (VLSI '97) which was sponsored by the International Federation for Information Processing (IFIP) and was held in Gramado, Brazil in August 1997. It is a state-of-the-book for researchers and managers working on system integration, design and CAD.

Preface
Conference Committees
A low-power H.263 video CoDec core dedicated to mobile computingp. 3
A VLSI architecture for real time edge linkingp. 15
VLSI implementation of contour extraction from real time image sequencesp. 27
An architecture for a 12 bits low power integrated CMOS pressure sensor with thermal compensationp. 41
On-line testing of analog circuits by adaptive filtersp. 53
A multi-mode signature analyzer for analog and mixed circuitsp. 65
An all-digital single-chip symbol synchronizer and channel decoder for DVBp. 79
An ATM switching element with programmable capacityp. 91
Reconfigurable CPU cache memory design: fault tolerance and performance evaluationp. 103
A low-voltage operational transconductance amplifier and its application to a bandpass Gm-C filterp. 117
A programmable second generation SI integrator for low-voltage applicationsp. 129
Low-voltage current-mode analogue continuous-time filtersp. 139
A set of device generators for analog and mixed-signal layout synthesisp. 151
E-TSPC: extended true single-phase-clock CMOS circuit techniquep. 165
Noise and power programmability in semi-custom I/O buffersp. 177
Charge pump DPLL to operate at high frequenciesp. 189
A 3.3 Gb/s sample circuit with GaAs MESFET technology and SCFL gatesp. 201
An embedded accelerator for real world computingp. 215
Design of a low power 108-bit conditional sum adder using energy economized pass-transistor logic (EEPL)p. 227
A novel globally asynchronous locally synchronous sliding window DFT implementationp. 239
Unfolded redundant CORDIC VLSI architectures with reduced area and power consumptionp. 251
Multi-view design of asynchronous micropipeline systems using Rainbowp. 265
High level synthesis of protocols by a formal description techniquep. 277
Matisse: a concurrent and object-oriented system specification languagep. 289
Library free technology mappingp. 303
An implicit formulation for exact BDD minimization of incompletely specified functionsp. 315
Sequential logic optimization with implicit retiming and resynthesisp. 327
Boolean mapping based on testing techniquesp. 339
Testability analysis of circuits using data-dependent power managementp. 353
Data sequencing for minimum-transition transmissionp. 365
Spurious transitions in adder circuits: analytical modelling and simulationsp. 377
Power reduction through clock gating by symbolic manipulationp. 389
A timing-driven floorplanning algorithm with the Elmore delay model for building block layoutp. 403
Efficient layout style for three-metal CMOS macro-cellsp. 415
Coupled circuit-interconnect modeling and simulationp. 427
Accurate static timing analysis for deep submicronic CMOS circuitsp. 439
A time driven adder generator architecturep. 453
User guided high level synthesisp. 464
Empirical interconnect crosstalk characterization for high level synthesisp. 476
Methods and tools for high and system level synthesisp. 488
A new frequency-domain analog test generation toolp. 503
Boundary-scan testing for mixed-signal MCMsp. 515
Stress testing: a low cost alternative for burn-inp. 526
Non-Monte Carlo simulation and sensitivity of linear(ized) analog circuits under parameter variationsp. 540
Top-down design methodology and technology for microsystemsp. 552
Index of Contributorsp. 567
Keyword Indexp. 569
Table of Contents provided by Blackwell. All Rights Reserved.

ISBN: 9780412823701
ISBN-10: 0412823705
Series: IFIP Advances in Information and Communication Technology
Audience: Professional
Format: Hardcover
Language: English
Number Of Pages: 570
Published: December 2009
Publisher: Chapman and Hall
Country of Publication: GB
Dimensions (cm): 23.5 x 15.5  x 3.18
Weight (kg): 2.2