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System-Level Design Techniques for Energy-Efficient Embedded Systems - Marcus T. Schmitz

System-Level Design Techniques for Energy-Efficient Embedded Systems

Hardcover Published: 31st December 2003
ISBN: 9781402077500
Number Of Pages: 194

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By shrinking feature sizes, deep-submicron technology is enabling the design of systems with increased complexity on a single chip, but it is also introducing a productivity design gap. Additionally, system designers have to cope with an ever-increasing application complexity and shrinking time-to-market windows. Design re-use and system-level co-synthesis are two approaches that are being employed to bridge the design gap and to aid system designers. Power consumption has become one of the main barriers in embedded computing systems design and therefore, methodologies and techniques that provide power-aware hardware/software co-design are necessary. System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone. System-Level Design Techniques for Energy-Efficient Embedded Systems will be of interest to advanced undergraduates, graduate students, and designers, whom are interested in energy-efficient embedded systems design.

List of Figures
List of Tables
Embedded System Design Flow
System Specification
Hardware and Software Synthesis
Book Overview
Energy Dissipation of Processing Elements
Energy Minimisation Techniques
Energy Dissipation of Communication Links
Further Reading
Concluding Remarks
Power Variation-Driven Dynamic Voltage Scaling
Algorithms for Dynamic Voltage Scaling
Experimental Results: Energy-Gradient-Based Dynamic Voltage Scaling
Concluding Remarks
Optimisation of Mapping and Scheduling for Dynamic Voltage Scaling
Schedule Optimisation
Optimisation of Task and Communication Mapping
Optimisation of Allocation
Concluding Remarks
Energy-Efficient Multi-Mode Embedded Systems
Motivational Examples
Previous Work
Problem Formulation
Co-Synthesis of Energy-Efficient Multi-Mode Systems
Experimental Results: Multi-Mode
Concluding Remarks
Dynamic Voltage Scaling for Control Flow-Intensive Applications
Dong Wu
The Conditional Task Graph Model
Schedule Table for CTGs
Dynamic Voltage Scaling for CTGs
Voltage Scaling Technique for CTGs
Lopocos: A Low Power Co-Synthesis Tool
Smart Phone Description
Concluding Remarks
Future Directions
Table of Contents provided by Publisher. All Rights Reserved.

ISBN: 9781402077500
ISBN-10: 1402077505
Audience: Professional
Format: Hardcover
Language: English
Number Of Pages: 194
Published: 31st December 2003
Publisher: Springer-Verlag New York Inc.
Country of Publication: US
Dimensions (cm): 23.5 x 15.5  x 1.27
Weight (kg): 1.08