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Reconfigurable Computing: Architectures, Tools and Applications : 6th International Symposium, ARC 2010, Bangkok, Thailand, March 17-19, 2010, Proceedings - Phaophak Sirisuk

Reconfigurable Computing: Architectures, Tools and Applications

6th International Symposium, ARC 2010, Bangkok, Thailand, March 17-19, 2010, Proceedings

By: Phaophak Sirisuk (Editor), Fearghal Morgan (Editor), Tarek El-Ghazawi (Editor), Hideharu Amano (Editor)

Paperback

Published: 17th March 2010
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Recon?gurable computing (RC) systems have generated considerable interest in the embedded and high-performance computing communities over the past two decades, with ?eld programmable gate arrays (FPGAs) as the leading techn- ogy at the helm of innovation in this discipline. Achieving orders of magnitude performance and power improvements using FPGAs over traditional microp- cessorsis not uncommon for well-suitedapplications. But even with two decades of research and technological advances, FPGA design still presents a subst- tial challenge and often necessitates hardware design expertise to exploit its true potential. Although the challenges to address the design productivity - sues are steep, the promise and the potential of the RC technology in terms of performance, power, size, and versatility continue to attract application design engineers and RC researchers alike. The International Symposium on Applied Recon?gurable Computing (ARC) aims to bring together researchers and practitioners of RC systems with an emphasis on practical applications and design methodologies of this promising technology. This year's ARC symposium (The sixth ARC symposium) was held in Bangkok, Thailand during March 17-19, 2010, and attracted papers in three primary focus areas: RC applications, RC architectures, and RC design meth- ologies.

Keynotes (Abstracts)
High-Performance Energy-Efficient Reconfigurable Accelerators/Co-processors for Tera-Scale Multi-core Microprocessorsp. 1
Process Variability and Degradation: New Frontier for Reconfigurablep. 2
Towards Analytical Methods of FPGA Architecture Investigationp. 3
Architectures 1
Generic Systolic Array for Run-Time Scalable Coresp. 4
Virtualization within a Parallel Array of Homogeneous Processing Unitsp. 17
Feasibility Study of a Self-healing Hardware Platformp. 29
Applications 1
Application-Specific Signatures for Transactional Memory in Soft Processorsp. 42
Towards Rapid Dynamic Partial Reconfiguration in Video-Based Driver Assistance Systemsp. 55
Parametric Encryption Hardware Designp. 68
A Reconfigurable Implementation of the Tate Pairing Computation over GF(2m)p. 80
Architectures 2
Application Specific FPGA Using Heterogeneous Logic Blocksp. 92
Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chipp. 110
A Dedicated Reconfigurable Architecture for Finite State Machinesp. 122
MEMS Dynamic Optically Reconfigurable Gate Array Usable under a Space Radiation Environmentp. 134
Applications 2
An FPGA Accelerator for Hash Tree Generation in the Merkle Signature Schemep. 145
A Fused Hybrid Floating-Point and Fixed-Point Dot-Product for FPGAsp. 157
Optimising Memory Bandwidth Use for Matrix-Vector Multiplication in Iterative Methodsp. 169
Design of a Financial Application Driven Multivariate Gaussian Random Number Generator for an FPGAp. 182
Design Tools 1
3D Compaction: A Novel Blocking-Aware Algorithm for Online Hardware Task Scheduling and Placement on 2D Partially Reconfigurable Devicesp. 194
TROUTE: A Reconfigurability-Aware FPGA Routerp. 207
Space and Time Sharing of Reconfigurable Hardware for Accelerated Parallel Processingp. 219
Routing-Aware Application Mapping Considering Steiner Points for Coarse-Grained Reconfigurable Architecturep. 231
Design Tools 2
Design Automation for Reconfigurable Interconnection Networksp. 244
A Framework for Enabling Fault Tolerance in Reconfigurable Architecturesp. 257
QUAD-A Memory Access Pattern Analyserp. 269
Hierarchical Loop Partitioning for Rapid Generation of Runtime Configurationsp. 282
Applications 3
Reconfigurable Computing and Task Scheduling for Active Storage Service Processingp. 294
A Reconfigurable Disparity Engine for Stereovision in Advanced Driver Assistance Systemsp. 306
A Modified Merging Approach for Datapath Configuration Time Reductionp. 318
Posters
Reconfigurable Computing Education in Computer Sciencep. 329
Hardware Implementation of the Orbital Function for Quantum Chemistry Calculationsp. 337
Reconfigurable Polyphase Filter Bank Architecture for Spectrum Sensingp. 343
Systolic Algorithm Mapping for Coarse Grained Reconfigurable Array Architecturesp. 351
A GMM-Based Speaker Identification System on FPGAp. 358
An FPGA-Based Real-Time Event Samplerp. 364
A Performance Evaluation of CUBE: One-Dimensional 512 FPGA Clusterp. 372
An Analysis of Delay Based PUF Implementations on FPGAp. 382
Comparison of Bit Serial Computation with Bit Parallel Computation for Reconfigurable Processorp. 388
FPGA Implementation of QR Decomposition Using MGS Algorithmp. 394
Memory-Centric Communication Architecture for Reconfigurable Computingp. 400
Integrated Design Environment for Reconfigurable HPCp. 406
Architecture-Aware Custom Instruction Generation for Reconfigurable Processorsp. 414
Cost and Performance Evaluation of a Noise Filter for Partitioning in Co-design Methodologiesp. 420
Towards a Tighter Integration of Generated and Custom-Made Hardwarep. 426
Pipelined Microprocessors Optimization and Debuggingp. 435
Author Indexp. 445
Table of Contents provided by Ingram. All Rights Reserved.

ISBN: 9783642121326
ISBN-10: 3642121322
Series: Lecture Notes in Computer Science
Audience: Professional
Format: Paperback
Language: English
Number Of Pages: 450
Published: 17th March 2010
Publisher: Springer-Verlag Berlin and Heidelberg Gmbh & Co. Kg
Country of Publication: DE
Dimensions (cm): 23.5 x 15.5  x 2.29
Weight (kg): 0.71