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On Optimal Interconnections for VLSI : KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE - Andrew B. Kahng

On Optimal Interconnections for VLSI

KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE

Hardcover

Published: 31st December 1994
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On Optimal Interconnections for VLSI describes, from a geometric perspective, algorithms for high-performance, high-density interconnections during the global and detailed routing phases of circuit layout. First, the book addresses area minimization, with a focus on near-optimal approximation algorithms for minimum-cost Steiner routing. In addition to practical implementations of recent methods, the implications of recent results on spanning tree degree bounds and the method of Zelikovsky are discussed. Second, the book addresses delay minimization, starting with a discussion of accurate, yet algorithmically tractable, delay models. Recent minimum-delay constructions are highlighted, including provably good cost-radius tradeoffs, critical-sink routing algorithms, Elmore delay-optimal routing, graph Steiner arborescences, non-tree routing, and wiresizing. Third, the book addresses skew minimization for clock routing and prescribed-delay routing formulations. The discussion starts with early matching-based constructions and goes on to treat zero-skew routing with provably minimum wirelength, as well as planar clock routing. Finally, the book concludes with a discussion of multiple (competing) objectives, i.e., how to optimize area, delay, skew, and other objectives simultaneously. These techniques are useful when the routing instance has heterogeneous resources or is highly congested, as in FPGA routing, multi-chip packaging, and very dense layouts. Throughout the book, the emphasis is on practical algorithms and a complete self-contained development. On Optimal Interconnections for VLSI will be of use to both circuit designers (CAD tool users) as well as researchers and developers in the area of performance-driven physical design.

List of Figures
List of Tables
Preliminariesp. 1
The Domain of Discourse: Routing in VLSI Physical Designp. 2
Overview of the Bookp. 8
Areap. 16
Performance Bounds for MST-Based Strategiesp. 25
Iterated 1-Steiner (I1S)p. 31
Enhancing I1S Performancep. 43
Practical Implementation Options for I1Sp. 48
On The Maximum MST Degreep. 54
Steiner Trees in Graphsp. 56
Experimental Resultsp. 59
Delayp. 64
Preliminariesp. 65
Geometric Approaches to Delay Minimizationp. 69
Minimization of Actual Delayp. 103
New Directionsp. 128
Skewp. 140
Preliminariesp. 141
An Early Matching-Based Approachp. 145
DME: Exact Zero Skew With Minimum Wirelengthp. 163
Planar-Embeddable Treesp. 184
Multiple Objectivesp. 197
Minimum Density Treesp. 198
Multi-Weighted Graphsp. 215
Prescribed-Width Routingp. 223
A Appendix: Signal Delay Estimatorsp. 239
Basicsp. 239
Accuracy and Fidelityp. 246
Referencesp. 252
Author Indexp. 275
Term Indexp. 281
Table of Contents provided by Blackwell. All Rights Reserved.

ISBN: 9780792394839
ISBN-10: 0792394836
Series: KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE
Audience: Professional
Format: Hardcover
Language: English
Number Of Pages: 286
Published: 31st December 1994
Publisher: Springer
Country of Publication: NL
Dimensions (cm): 24.77 x 16.51  x 2.54
Weight (kg): 0.64