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Modeling of Electrical Overstress in Integrated Circuits : The Springer International Engineering and Computer Science - Carlos H. Diaz

Modeling of Electrical Overstress in Integrated Circuits

The Springer International Engineering and Computer Science

Hardcover Published: 30th November 1994
ISBN: 9780792395058
Number Of Pages: 148

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Electrical overstress (EOS) and Electrostatic discharge (ESD) pose one of the most dominant threats to integrated circuits (ICs). These reliability concerns are becoming more serious with the downward scaling of device feature sizes. Modeling of Electrical Overstress in Integrated Circuits presents a comprehensive analysis of EOS/ESD-related failures in I/O protection devices in integrated circuits.
The design of I/O protection circuits has been done in a hit-or-miss way due to the lack of systematic analysis tools and concrete design guidelines. In general, the development of on-chip protection structures is a lengthy expensive iterative process that involves tester design, fabrication, testing and redesign. When the technology is changed, the same process has to be repeated almost entirely. This can be attributed to the lack of efficient CAD tools capable of simulating the device behavior up to the onset of failure which is a 3-D electrothermal problem. For these reasons, it is important to develop and use an adequate measure of the EOS robustness of integrated circuits in order to address the on-chip EOS protection issue. Fundamental understanding of the physical phenomena leading to device failures under ESD/EOS events is needed for the development of device models and CAD tools that can efficiently describe the device behavior up to the onset of thermal failure.
Modeling of Electrical Overstress in Integrated Circuits is for VLSI designers and reliability engineers, particularly those who are working on the development of EOS/ESD analysis tools. CAD engineers working on development of circuit level and device level electrothermal simulators will also benefit from the material covered. This book will also be of interest to researchers and first and second year graduate students working in semiconductor devices and IC reliability fields.

List of Figures
List of Tables
Preface
Acknowledgements
Electrical Overstress in ICSp. 1
NMOS ESD Protection Devices and Process Related Issuesp. 11
Measuring EOS Robustness in ICSp. 25
EOS Thermal Failure Simulation for Integrated Circuitsp. 43
ITSIM: A Nonlinear 2D - 1D Thermal Simulatorp. 63
2D Electrothermal Analysis of Device Failure in MOS Processesp. 73
Circuit-Level Electrothermal Simulationp. 85
IETSIM: An Electrothermal Circuit Simulatorp. 111
Summary and Future Researchp. 129
Bibliographyp. 133
Indexp. 143
About the Authorsp. 147
Table of Contents provided by Blackwell. All Rights Reserved.

ISBN: 9780792395058
ISBN-10: 0792395050
Series: The Springer International Engineering and Computer Science
Audience: General
Format: Hardcover
Language: English
Number Of Pages: 148
Published: 30th November 1994
Publisher: SPRINGER VERLAG GMBH
Country of Publication: US
Dimensions (cm): 23.11 x 17.63  x 1.6
Weight (kg): 0.4

Earn 587 Qantas Points
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