Logic Synthesis for FPGA-Based Mealy Finite State Machines

This book is devoted to logic synthesis of field programmable gate array (FPGA)-based circuits of Mealy finite state machines (FSM). Three new methods of state assignment are proposed which allows obtaining FSM circuits required minimum amount of internal chip resources.

Logic Synthesis for FPGA-Based Mealy Finite State Machines: Structural Decomposition in Logic Design contains several original synthesis and optimization methods based on structural decomposition of FPGA-based FSM circuits developed by the authors. To optimize FSM circuits, the authors introduce the use three of methods of state assignment: twofold, extended, and composite. These methods allow for creating two-or three level architectures of FSM circuits. The authors also demonstrate how the proposed methods, FSM architectures and synthesis methods can replace known solutions based on either functional decomposition or classical methods of structural decomposition. The authors also show how these architectures have regular systems of interconnections and demonstrate positive features as compared to methods based on functional decomposition including producing circuits with fewer elements, that are faster and consume less power than their counterparts. The book includes experimental results proving efficiency of the proposed solutions and compares the numbers in Look-up Tables (LUTs), showing performance (maximum operating frequency) and power consumption for various methods of state assignment.

The audience for this book is students researchers, and engineers specializing in computer science/ engineering, electronics, and telecommunications. It will be especially useful for engineers working with in the scope of algorithms, hardware-based software accelerators and control units, and systems based on the use of FPGA's.