Logic Synthesis and Optimization

By: Tsutomu Sasao (Editor)

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Hardcover | 31 January 1993

At a Glance

Hardcover
392 Pages

Dimensions(cm)
23.39 x 15.6 x 2.24

Hardcover

$310.47

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Logic Synthesis and Optimization presents up-to-date research information in a pedagogical form. The authors are recognized as the leading experts on the subject. The focus of the book is on logic minimization and includes such topics as two-level minimization, multi-level minimization, application of binary decision diagrams, delay optimization, asynchronous circuits, spectral method for logic design, field programmable gate array (FPGA) design, EXOR logic synthesis and technology mapping. Examples and illustrations are included so that each contribution can be read independently. Logic Synthesis and Optimization is an indispensable reference for academic researchers as well as professional CAD engineers.

Industry Reviews

'....I would recommend this book to any graduate student, or practising digital system design engineer, who wishes to know more about the subject and perhaps even develop new algorithms of his or her own.' Microprocessors and Microsystems 18:8 1994

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Non-Fiction Engineering & Technology Electronics & Communications Engineering Electronics Engineering Circuits & Components Computing & I.T.Computer Science Computer Architecture & Logic Design Graphical & Digital Media Applications Computer-Aided Design CAD Energy Technology & Engineering Electrical Engineering

Preface
A New Exact Minimizer for Two-Level Logic Synthesis	p. 1
A New Graph Based Prime Computation Technique	p. 33
Logic Synthesizers, the Transduction Method and Its Extension, Sylon	p. 59
Network Optimization Using Don't-Cares and Boolean Relations	p. 87
Multi-Level Logic Minimization of Large Combinational Circuits by Partitioning	p. 109
A Partitioning Method for Area Optimization by Tree Analysis	p. 127
A New Algorithm for 0-1 Programming Based on Binary Decision Diagrams	p. 145
Delay Models and Exact Timing Analysis	p. 167
Challenges to Dependable Asynchronous Processor Design	p. 191
Efficient Spectral Techniques for Logic Synthesis	p. 215
FPGA Design by Generalized Functional Decomposition	p. 233
Logic Synthesis With Exor Gates	p. 259
AND-EXOR Expressions and Their Optimization	p. 287
A Generation Method for Exor-Sum-Of-Products Expressions Using Shared Binary Decision Diagrams	p. 313
A New Technology Mapping Method Based on Concurrent Factorization and Mapping	p. 323
Gate Sizing for Cell-Based Designs	p. 341
A: About the Authors	p. 361
Table of Contents provided by Blackwell. All Rights Reserved.

Logic Synthesis and Optimization

At a Glance

Hardcover

Industry Reviews

Shipping

How to return your order

Defective items

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