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Interconnect-Centric Design for Advanced SOC and NOC : Mathematics & Its Applications S - Jari Nurmi

Interconnect-Centric Design for Advanced SOC and NOC

Mathematics & Its Applications S

By: Jari Nurmi (Editor), Hannu Tenhunen (Editor), Jouni Isoaho (Editor), Axel Jantsch (Editor)

Hardcover

Published: 20th July 2004
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In Interconnect-centric Design for Advanced SoC and NoC, we have tried to create a comprehensive understanding about on-chip interconnect characteristics, design methodologies, layered views on different abstraction levels and finally about applying the interconnect-centric design in system-on-chip design.
Traditionally, on-chip communication design has been done using rather ad-hoc and informal approaches that fail to meet some of the challenges posed by next-generation SOC designs, such as performance and throughput, power and energy, reliability, predictability, synchronization, and management of concurrency. To address these challenges, it is critical to take a global view of the communication problem, and decompose it along lines that make it more tractable. We believe that a layered approach similar to that defined by the communication networks community should also be used for on-chip communication design.
The design issues are handled on physical and circuit layer, logic and architecture layer, and from system design methodology and tools point of view. Formal communication modeling and refinement is used to bridge the communication layers, and network-centric modeling of multiprocessor on-chip networks and socket-based design will serve the development of platforms for SoC and NoC integration. Interconnect-centric Design for Advanced SoC and NoC is concluded by two application examples: interconnect and memory organization in SoCs for advanced set-top boxes and TV, and a case study in NoC platform design for more generic applications.

From the reviews:

"...a collection of edited chapters written by various experts on NoC and on-chip communications design; the editors contributed to several of the chapters and, for the others, drew on several colleagues-including those participating in Complain, the Finnish-Swedish Excite research project. The editors have carefully chosen the topics in this volume to reflect the multiple levels and types of design knowledge required to gain an appreciation of the field... this book is quite useful for educating any SoC design team in many of the areas critical to adapting their designs to future generations of interconnect. It can also be a useful reference text for advanced undergraduate- and graduate-level courses in SoC and VLSI design. Designers and design educators should take a close look at this book."
(IEEE Design & Test of Computers Magazine)

"The book is a collection of edited chapters written by various experts on NoC and on chip communications design ... . The editors have carefully chosen the topics in this volume ... . Clearly, the book covers an impressive breadth of topics ... . Each chapter surveys the relevant literature in its particular topic area and provides an extensive reference list ... . a useful reference text for advanced undergraduate- and graduate-level courses in SoC and VLSI design. Design and design educators should take a close look at this book." (Grant Martin, IEEE Design & Test of Computers, March-April, 2005)

Preface
Introduction
System-on-Chip Challenges in the Deep-Submicron
Physical and Electrical Issues
Wires as InterconnectsLi-Rong Zheng
Global Interconnect Analysis Towards No
Design Methodologies for On-Chip Inductive InterconnectMagdy
Clock Generation and Distribution for High-Performance SoC Designs
Logical and Architectural Issues
Error-Tolerant Interconnect Schemes
Power Reduction Coding for Buses
Overview of SoC Buses
From Buses to Networks
Arbitration and Routing Schemes for On-Chip Packet Networks
Design Methodology and Tools
Methodology and Techniques for Noise Reduction in SoC Interconnects
Formal Communication Modeling and Refinement
High-Level Communication Models for On-Chip Multiprocessor System Simulation
Socket-based Design Using Decoupled Interconnects
Application Cases
Interconnect and Memory Organization in SOCs for Advanced Set-Top Boxes and TV
A Brunch for the Coffee Table - Case Study in NOC Platform DesignTap
Table of Contents provided by Publisher. All Rights Reserved.

ISBN: 9781402078354
ISBN-10: 1402078358
Series: Mathematics & Its Applications S
Audience: Tertiary; University or College
Format: Hardcover
Language: English
Number Of Pages: 454
Published: 20th July 2004
Publisher: Springer-Verlag New York Inc.
Country of Publication: US
Dimensions (cm): 23.4 x 15.6  x 2.39
Weight (kg): 1.83