+612 9045 4394
 
CHECKOUT
Integrated Circuit Defect-Sensitivity : Theory and Computational Models :  Theory and Computational Models - Jose Pineda de Gyvez

Integrated Circuit Defect-Sensitivity : Theory and Computational Models

Theory and Computational Models

Hardcover Published: December 2009
ISBN: 9780792393061
Number Of Pages: 167

Share This Book:

Hardcover

RRP $430.99
$298.35
31%
OFF
or 4 easy payments of $74.59 with Learn more
Ships in 7 to 10 business days

Spot defects are random phenomena present in every fabrication line. As technological processes mature towards submicron features, the effect of these defects on the functional and parametric behavior of the IC becomes crucial. Integrated Circuit Defect-Sensitivity: Theory and Computational Models reviews the importance of a defect-sensitivity analysis in comtemporary VLSI design procedures. The modeling of defects in microelectronics technologies is revised from a set theoretical approach as well as from a practical point of view. This way of handling the material introduces the reader step-by-step to critical area analysis through the construction of formal mathematical models. The rigorous formalism developed in this book is necessary to study the construction of deterministic algorithms for layout defect exploration. Without this basis, it would be impossible to scan layouts in the order of 106 objects, or more, in a reasonable time. The theoretical component of this book is complemented with a set of practical case studies for fault extraction, yield prediction, and IC defect-sensitivity evaluation. These case studies emphasize the fact that by using appropriate formulae combining statistical data with the computed defect-sensitivity, an estimate of the IC's defect tolerance can be obtained at the end of the respective production line. The case studies range from highlighting their geometrical nature as a function of the defect size to more specific situations highlighting layout regions where faults may occur. In addition to the visualization of critical areas, numerical data in the form of tables, graphs and histograms are provided for quantification purposes. More that, ever smarter, defect-tolerant design strategies have to be devised to attain high yields. Obviously, the work presented in the book is not definitive, and more research will always be useful to advance the field of CAD for manufacturability. This is, of course, one of the interesting challenges imposed by the ever-changing nature of microelectronic technologies. CAD developers and yield practitioners from academia and industry will find that this book lays the foundations for further pioneering work.

Foreword
Preface
Introductionp. 1
Defect Semantics and Yield Modelingp. 7
Computational Models for Defect-Sensitivityp. 29
Single Defect Multiple Layer (SDML) Modelp. 49
Fault Analysis and Multiple Layer Critical Areasp. 79
Single Defect Single Layer (SDSL) Modelp. 93
IC Yield Prediction and Single Layer Critical Areasp. 109
Single vs. Multiple Layer Critical Areasp. 125
Referencesp. 137
Appendix 1: Sources of Defect Mechanismsp. 147
Appendix 2: End Effects of Critical Regionsp. 151
Appendix 3: NMOS Technology Filep. 159
Indexp. 163
Table of Contents provided by Blackwell. All Rights Reserved.

ISBN: 9780792393061
ISBN-10: 0792393066
Series: The Springer International Series in Engineering and Computer Science
Audience: Professional
Format: Hardcover
Language: English
Number Of Pages: 167
Published: December 2009
Publisher: Springer
Country of Publication: NL
Dimensions (cm): 23.5 x 15.5  x 1.91
Weight (kg): 1.0