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High Dielectric Constant Materials : VLSI MOSFET Applications - H. R. Huff

High Dielectric Constant Materials

VLSI MOSFET Applications

By: H. R. Huff (Editor), D.C. Gilmer (Editor)

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Published: 1st December 2004
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Issues relating to the high-K gate dielectric are among the greatest challenges for the evolving International Technology Roadmap for Semiconductors (ITRS). More than just an historical overview, this book will assess previous and present approaches related to scaling the gate dielectric and their impact, along with the creative directions and forthcoming challenges that will define the future of gate dielectric scaling technology. Topics include: an extensive review of Moore's Law, the classical regime for SiO2 gate dielectrics; the transition to silicon oxynitride gate dielectrics; the transition to high-K gate dielectrics (including the drive towards equivalent oxide thickness in the single-digit nanometer regime); and future directions and issues for ultimate technology generation scaling. The vision, wisdom, and experience of the team of authors will make this book a timely, relevant, and interesting, resource focusing on fundamentals of the 50 nm Technology Generation and beyond.

The Economic Implications of Moore's Lawp. 1
Introductionp. 1
Moore's Law: A Descriptionp. 1
The History of Moore's Lawp. 2
The Microeconomics of Moore's Lawp. 13
The Macroeconomics of Moore's Lawp. 21
Moore's Law Meets Moore's Wall: What is Likely to Happenp. 23
Conclusionp. 27
Appendix Ap. 28
Referencesp. 30
Classical Regime for SiO2
Brief Notes on the History of Gate Dielectrics in MOS Devicesp. 33
Early Attempts to Make Insulating-Gate Field-Effect Transistors; Surface Statesp. 33
Passivation of Silicon Surfaces by Thermal Oxidation; Planar Transistor Technologyp. 34
Positive Oxide Charge and Surface States at the Si-SiO2 Interfacep. 35
Instabilities Due to Ion Drift Effectsp. 36
Phosphate-silicate Glass Helpedp. 37
Other Materials Tried as Gate-Dielectric Layersp. 37
Thermal Oxidation of Siliconp. 38
Segregation of Dopants at the Si-SiO2 Interfacep. 39
Other Silicon Oxide Preparation Techniquesp. 40
Thick Field Oxidesp. 41
Breakdown Strength of SiO2, Defect Density, Moore's Lawp. 41
Weak Oxide Regions in MOS Structures, Kooi Effectp. 41
Al Gate MOS Devices; PMOS IC'sp. 42
Silicon Gate MOS Devices, NMOS and CMOS IC'sp. 42
Decrease of Oxide Thickness Connected with Downscaling of MOS Structurep. 43
Referencesp. 43
SiO2 Based MOSFETS: Film Growth and Si-SiO Interface Propertiesp. 45
SiO2 Prior to 1970p. 45
Introductionp. 45
A Brief Historical Surveyp. 45
What Is a MOSFET?p. 46
How Does a MOSFET Work?p. 48
Interface Electronic States and Chargep. 48
Implications of the Charges on MOSFET Operationp. 49
The Silicon Oxidation Model: Early Studiesp. 51
After 1970: Progress in Understandingp. 55
In situ Real-Time Oxidation Studies: Dry O2, the Effects of Water and Other Impuritiesp. 56
Arrhenius Behavior and Deviationsp. 61
Stress Effects on Oxidation Kineticsp. 62
Orientation Effects on Oxidation Kineticsp. 65
Effects of Light on Oxidation Kineticsp. 68
The Thin Film Regime (< 20 nm)p. 71
The Si-SiO2 Interface: Measurement and Implicationsp. 73
Modern Era: The Quest for Thinner SiO2 and Alternativesp. 76
Ultra-thin SiO2 Film Metrologyp. 76
Interfacial Roughness at the Si-SiO2 Interfacep. 80
Ultra-thin Film SiO2 Films and the Future of Gate Dielectricsp. 85
Referencesp. 86
Oxide Reliability Issuesp. 91
Thin Oxide Layer Degradation Under Electrical Stressp. 91
Interface Trap Creationp. 92
Oxide Charge Trappingp. 92
Hole Fluencep. 93
Neutral Electron Trap Generationp. 96
Stress-Induced Leakage Currentp. 97
Trap Generation Mechanism: Discussionp. 100
Oxide Breakdownp. 102
Breakdown Modelingp. 102
Soft Breakdownp. 105
Breakdown Acceleration Modelsp. 107
Voltage or Field Extrapolationp. 108
Temperature Dependence of Breakdownp. 110
Oxide Reliability Predictionsp. 111
Conclusionp. 111
Referencesp. 111
Transition to Silicon Oxynitrides
Gate Dielectric Scaling to 2.0-1.0 nm: SiO2 and Silicon Oxynitridep. 123
Device Requirements on Gate Dielectric Scalingp. 123
Definition of Gate Dielectric Thicknessp. 127
Electron Distribution in Accumulation and Inversion Layersp. 127
Polysilicon Gate Depletion Effectp. 127
Gate Capacitance and Equivalent Oxide Thickness (EOT) Determinationp. 130
Tunneling Current of SiO2p. 132
Modeling Electron Tunneling from Quasi-bound Statesp. 133
Tunneling Current as a Function of Thicknessp. 133
Tunneling Currents of Silicon Oxynitridep. 135
Application Dependence of Gate Dielectric Limitp. 137
Referencesp. 140
Optimal Scaling Methodologies and Transistor Performancep. 143
Introductionp. 143
Scaling and Device Physicsp. 145
MASTAR Modelp. 145
Voltage-Doping Transformationp. 148
Short Channel Effect (SCE)p. 150
Drain-Induced Barrier Lowering (DIBL)p. 151
Junction Depth Effectp. 151
Understanding the """"Good Design Rules""""p. 153
Limitations of Conventional Scalingp. 154
Limitations Menacing the Vth/Vdd Scalingp. 154
Limitations Menacing the Tox_e/L Scalingp. 155
Limitations Menacing the Xj/L Scalingp. 161
Limitations Menacing the Tdep/L Scalingp. 163
Impact on the Roadmapp. 163
Extending Validity of Moore's Lawp. 165
Strategies Based on Increased Gate Drive (Vdd-Vth)p. 165
Strategies Based on Even More Aggressive Scalingp. 169
Strategies Based on New Materialsp. 176
Strategies Based on Improvements of Device Architecturep. 182
How Far Can We Go and How Much Should We Pay?p. 187
Conclusionsp. 190
Referencesp. 192
Silicon Oxynitride Gate Dielectric for Reducing Gate Leakage and Boron Penetration Prior to High-k Gate Dielectric Implementationp. 195
Introductionp. 195
Integrated RTCVD Oxynitride(ION) Processp. 197
Experimentp. 197
Results and Discussionp. 198
JVD Nitridep. 207
Experimentp. 207
Results and Discussionp. 207
DPN Oxynitridep. 211
Experimentp. 211
Results and Discussionp. 212
Conclusionp. 218
Referencesp. 219
Transition to High-k Gate Dielectrics
Alternative Dielectrics for Silicon-Based Transistors: Selection Via Multiple Criteriap. 223
Introductionp. 223
Discussionp. 226
Development of Selection Criteriap. 226
Application of the Selection Criteriap. 239
Conclusionsp. 247
Referencesp. 248
Materials Issues for High-k Gate Dielectric Selection and Integrationp. 253
Introductionp. 253
Improved Performance Through Scalingp. 254
Leakage Current and Powerp. 256
MIS (Metal-Insulator-Semiconductor) Structuresp. 257
Issues for Interface Engineeringp. 257
High-k Device Modeling and Transportp. 260
Materials Properties and Integration Considerationsp. 261
Permittivity and Barrier Heightp. 261
Thermodynamic Stability on Sip. 266
Interface Qualityp. 269
Film Morphologyp. 270
Gate Compatibilityp. 272
Process Compatibilityp. 275
Reliabilityp. 276
Conclusionsp. 277
Referencesp. 277
Designing Interface Composition and Structure in High Dielectric Constant Gate Stacksp. 287
Introductionp. 287
Thermodynamic Stability of Dielectrics on Siliconp. 290
Silicide Formation and SiO Evolution During Post-deposition Processingp. 290
Affect of Excess Oxygen on Final State Energeticsp. 292
Chemical Mechanisms in Silicon Interface Oxidationp. 295
Kinetic Rate Processes During Metal Oxide Depositionp. 297
Driving Forces for Reactions During Metal Oxide Deposition on Clean Siliconp. 297
Role of Surface Pre-treatment and Passivationp. 300
Important Issuesp. 303
Gate Electrode/Dielectric Interfacesp. 304
Polysilicon/Dielectric Interfacesp. 304
Metal/Dielectric Interfacesp. 304
Conclusionp. 305
Referencesp. 306
Electronic Structure of Alternative High-k Dielectricsp. 311
Introductionp. 311
SiO2 and the Si-SiO2 Interfacep. 313
Interfacial Transition Regions Between Crystalline Si and Non-crystalline SiO2p. 313
Local Atomic Structure of SiO2p. 315
Electronic Structure of SiO2p. 316
Local Atomic Structure of the Si-SiO2 Interfacep. 319
Alternative Dielectricsp. 322
Classification of High-K Non-crystalline Dielectricsp. 322
Electronic Structure of Transition Metal Dielectricsp. 327
Empirical Correlations Between Electronic Structure and Atomic d-State Energiesp. 327
Extension of Ab Initio Calculations to Transition Metal Oxidesp. 330
Experimental Studies of Electronic Structurep. 333
Valence Bandp. 333
Anti-bonding Conduction Band States of TM Oxidesp. 333
TM and RE Alloysp. 335
XPS and AES Results for Zr Silicatesp. 339
Trapping at Transition Metal Atoms in Al2O3-Ta2O5 Alloysp. 347
Interface Electronic Structure Applied to Direct Tunneling in Silicate Alloysp. 348
Conclusionp. 353
Referencesp. 355
Physicochemical Properties of Selected 4d, 5d, and Rare Earth Metals in Siliconp. 359
Introductionp. 359
Crystal Lattice Site of 4d, 5d, and Rare Earth Metals in Siliconp. 360
Solubility of 4d, 5d, and Rare Earth Metals in Siliconp. 361
Diffusivity of 4d, 5d, and Rare Earth Elements in Siliconp. 362
Diffusivity of Pr, Sr, Ba, Zr, and Hfp. 362
Diffusivity of Er, Pm, Yb, Tb, Ho, and Mo in Silicon .p. 364
Diffusivity of Heavy Metals in Silicon: A Discussionp. 367
Energy Levels in the Band Gapp. 368
Energy Levels of Y, Zr, and Hfp. 368
Electrical Levels of Mo, Nb, Ta, and Wp. 369
Electrical Levels of the Rare Earth Elements: Er, Tb, Ho, or Dyp. 370
Effect of 4d, 5d, and Rare Earth Metals on Minority Carrier Recombination Lifetime and Device Performancep. 372
Summarizing Discussionp. 374
Referencesp. 375
High-k Gate Dielectric Deposition Technologiesp. 379
Atomic Layer Depositionp. 380
Technology Descriptionp. 380
Chemical Reaction Mechanisms and Precursorsp. 381
Processing Reactors and Chemical Delivery Systemp. 387
Film Composition, Microstructure, and Electrical Resultsp. 391
Chemical Vapor Depositionp. 391
Technology Descriptionp. 391
Chemical Reaction Mechanisms and Kineticsp. 392
Processing Reactors and Chemical Delivery Systemp. 392
Film Composition, Microstructure, and Electrical Resultsp. 393
Plasma-Enhanced Atomic Layer Depositionp. 393
Technology Descriptionp. 393
Chemical Reaction Mechanisms and Kineticsp. 394
Processing Reactors and Chemical Delivery Systemp. 395
Film Composition, Microstructure, and Electrical Resultsp. 396
Plasma Enhanced Chemical Vapor Depositionp. 396
Technology Descriptionp. 396
Chemical Reaction Mechanisms and Kineticsp. 397
Processing Reactors and Chemical Delivery Systemp. 397
Film Composition, Microstructure, and Electrical Resultsp. 399
Physical Vapor Depositionp. 399
Technology Descriptionp. 399
Chemical Reaction Mechanisms and Kineticsp. 400
Processing Reactors and Chemical Delivery Systemp. 401
Film Composition, Microstructure, and Electrical Resultsp. 401
Molecular Beam Epitaxyp. 403
Technology Descriptionp. 403
Chemical Reaction Mechanisms and Kineticsp. 403
Processing Reactors and Chemical Delivery Systemp. 404
Film Composition, Microstructure, and Electrical Resultsp. 404
Ion Beam Assisted Depositionp. 404
Technology Descriptionp. 404
Chemical Reaction Mechanisms and Kineticsp. 404
Processing Reactors and Chemical Delivery Systemp. 405
Film Composition, Microstructure, and Electrical Resultsp. 405
Sol-gel Depositionp. 405
Technology Descriptionp. 405
Chemical Reaction Mechanisms and Kineticsp. 406
Processing Reactors and Chemical Delivery Systemp. 406
Film Composition, Microstructure, and Electrical Resultsp. 406
Summaryp. 406
Referencesp. 407
Issues in Metal Gate Electrode Selection for Bulk CMOS Devicesp. 415
Backgroundp. 415
Metal Gate Selection Criteriap. 416
Other Challenges with Metal Gatesp. 418
Metal Gate Candidates for NMOS Devicesp. 419
Metal Nitridesp. 419
Metal Silicon Nitridesp. 423
Binary Metal Alloysp. 425
Metal Candidates for PMOS Devicesp. 430
Metals on High-k Dielectricsp. 430
Conclusionp. 431
Referencesp. 432
CMOS IC Fabrication Issues for High-k Gate Dielectric and Alternate Electrode Materialsp. 435
Introductionp. 435
The """"Standard"""" CMOS Flowp. 436
Isolationp. 436
Well and Channel Dopingp. 438
Gate Dielectric/Gate Stackp. 438
Source and Drainp. 440
Silicide and Contactp. 440
Insertion of High-k Gate Dielectric into the CMOS Flowp. 442
High-k Materials as a Substitute for SiONp. 442
Interactions with/During the Gate Electrode Depositionp. 444
Gate Electrode Etch Concerns - Stopping on High-kp. 445
Surface Preparation (Cleans) in the Presence of High-k Materialsp. 445
Poly Silicon Oxidationp. 445
Source and Drain Extension Formationp. 446
Spacer Formationp. 446
Source and Drain Formationp. 447
Silicidationp. 448
Contact and Metallization - Low Temperature Processesp. 448
Sinterp. 448
Alternative Electrode Materialsp. 449
The Need for Alternative Electrode Materialsp. 449
Material Classes Under Consideration as Alternative Electrode Materialsp. 450
Dual Work Function Gate Stack Implementationp. 457
Integration of High-k Gate Dielectrics and Metal Gates into Advanced Devicesp. 461
Advanced Planar Integration Schemesp. 461
Advanced Non-planar Integration Schemesp. 466
Conclusionsp. 470
Referencesp. 471
Characterization and Metrology of Medium Dielectric Constant Gate Dielectric Filmsp. 483
Introductionp. 483
Structural and Chemical Characterization of Medium ¿ Film Stacksp. 486
Characterization Methodsp. 487
Structure/Function Relationshipsp. 500
Characterization Results for Medium kp. 501
Optical Models for Medium k Filmsp. 503
Referencesp. 517
Electrical Measurement Issues for Alternative Gate Stack Systemsp. 521
Introductionp. 521
Capacitance-Voltage Measurementp. 522
Overviewp. 522
Backgroundp. 523
Definition of Capacitancep. 524
Measurement of Capacitance and Its Output in Series or Parallel Modep. 528
More Complex Equivalent Circuitsp. 531
Additional Capacitance-Related Measurement Topics for High-k Gate Stacksp. 537
Practical Capacitance Measurement Issuesp. 544
Analysis of Device/Material Parameters from Established C-V Datap. 548
Current-Voltage Measurementp. 551
Parasitic Series Resistancep. 551
Temperature Dependencep. 553
Time Dependence Effectsp. 553
Determination of DC Conduction Mechanismsp. 556
Sample Design and Preparation Issuesp. 560
Conclusionp. 562
Referencesp. 562
High-k Gate Dielectric Materials Integrated Circuit Device Design Issuesp. 567
Introductionp. 567
Fundamental Issues on Gate Capacitance and Current Modelingp. 568
Modelsp. 568
ZrO2 and HfO2 NMOSCAP Cg, Ig-Vg Analysisp. 574
Conclusions for Fundamental Issues on Gate Capacitance and Current Modelingp. 579
Wave Function Penetration Effect Issuesp. 579
Quantum Transmitting Boundary (QTBM) Methodp. 580
Effects on Quantizationp. 583
High-k Tunneling Gate Currents Trend Studyp. 584
Wave Function Penetration Effects on Gate Capacitancep. 586
Maxwell-Wagner Effects and Power Law Dispersionp. 591
Interfacial Polarization in High-k Gate Stacksp. 591
Power Law Dispersion and Its Impact on Device Performancep. 597
Conclusions for Maxwell-Wagner Effects and Power Law Dispersionp. 602
Conclusionsp. 602
Referencesp. 603
Future Directions for Ultimate Scaling Technology Generations
High-k Crystalline Gate Dielectrics: A Research Perspectivep. 607
Introductionp. 607
The Path to the Perovskites and COSp. 610
MBEp. 610
Rules for COSp. 612
The Material System of COSp. 614
Alkaline Earth Metal Silicidep. 615
Alkaline Earth Oxidesp. 616
Perovskitesp. 617
The Implementation of COSp. 619
Layer-Sequenced COS Growthp. 619
The Importance of the Silicidep. 625
Alkaline Earth Metalp. 628
Oxide Growthp. 628
Electrical Propertiesp. 629
Band Offsetp. 630
Interface Trapsp. 631
Channel Mobilityp. 633
Conclusionp. 634
Referencesp. 635
High-k Crystalline Gate Dielectrics: An IC Manufacturer's Perspectivep. 639
Introductionp. 639
Theoretical Overviewp. 644
Perovskite Surfacep. 644
Oxide Depositionp. 647
Growth Templatep. 648
Substrate Preparationp. 649
Initial Nucleationp. 650
Stability of the Interfacep. 653
Structural Propertiesp. 654
Band Discontinuityp. 658
Device Resultsp. 661
Conclusionp. 663
Referencesp. 664
Advanced MOS-Devicesp. 667
Introductionp. 667
Prospectusp. 672
The Ballistic Nanotransitorp. 674
Vertical Replacement Gate MOSFETp. 681
The Double-Gate FinFETp. 688
Silicon-On-Nothing MOSFETsp. 692
Conclusionp. 701
Referencesp. 702
Indexp. 707
Table of Contents provided by Publisher. All Rights Reserved.

ISBN: 9783540210818
ISBN-10: 3540210814
Series: Springer Series in Advanced Microelectronics
Audience: Professional
Format: Hardcover
Language: English
Number Of Pages: 710
Published: 1st December 2004
Publisher: Springer-Verlag Berlin and Heidelberg Gmbh & Co. Kg
Country of Publication: DE
Dimensions (cm): 23.5 x 15.5  x 4.45
Weight (kg): 2.65