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Hardware Design and Petri Nets - Alex Yakovlev

Hardware Design and Petri Nets

By: Alex Yakovlev (Editor), Luis Gomes (Editor), Luciano Lavagno (Editor)

Hardcover Published: 29th February 2000
ISBN: 9780792377917
Number Of Pages: 332

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Hardware Design and Petri Nets presents a summary of the state of the art in the applications of Petri nets to designing digital systems and circuits. The area of hardware design has traditionally been a fertile field for research in concurrency and Petri nets. Many new ideas about modelling and analysis of concurrent systems, and Petri nets in particular, originated in theory of asynchronous digital circuits. Similarly, the theory and practice of digital circuit design have always recognized Petri nets as a powerful and easy-to-understand modelling tool. The ever-growing demand in the electronic industry for design automation to build various types of computer-based systems creates many opportunities for Petri nets to establish their role of a formal backbone in future tools for constructing systems that are increasingly becoming distributed, concurrent and asynchronous. Petri nets have already proved very effective in supporting algorithms for solving key problems in synthesis of hardware control circuits. However, since the front end to any realistic design flow in the future is likely to rely on more pragmatic Hardware Description Languages (HDLs), such as VHDL and Verilog, it is crucial that Petri nets are well interfaced to such languages. Hardware Design and Petri Nets is divided into five parts, which cover aspects of behavioral modelling, analysis and verification, synthesis from Petri nets and STGs, design environments based on high-level Petri nets and HDLs, and finally performance analysis using Petri nets. Hardware Design and Petri Nets serves as an excellent reference source and may be used as a text for advanced courses on the subject.

Prefacep. vii
Hardware Modelling using Petri Nets
Comprehensive Causal Specification of Asynchronous Controller and Arbiter Behaviourp. 3
Complementing Role Models with Petri Nets in Studying Asynchronous Data Communicationsp. 33
Petri Net Representations of Computational and Communication Operatorsp. 51
Model Analysis and Verification for Asynchronous Design
Properties of Change Diagramsp. 77
LTrL-based Model Checking for a Restricted Class of Signal Transition Graphsp. 93
A Polynomial Algorithm to Compute the Concurrency Relation of a Regular STGp. 107
Theory and Practice of Petri Net Based Synthesis
Synthesis of Synchronous Digital Systems Specified by Petri Netsp. 129
Deriving Signal Transition Graphs from Behavioral Verilog HDLp. 151
The Design of the Control Circuits for an Asynchronous Instruction Prefetch Unit Using Signal Transition Graphsp. 171
Hardware Design Methods and Tools
Electronic System Design Automation Using High Level Petri Netsp. 193
An Evolutionary Approach to the Use of Petri Net based Modelsp. 205
Modelling and Implementation of Petri Nets Using VHDLp. 223
Architecture Modelling and Performance Analysis
Performance Analysis of Asynchronous Circuits and Systems using Stochastic Timed Petri Netsp. 239
Performance Analysis of Dataflow Architectures Using Timed Coloured Petri Netsp. 269
Modeling a Memory Subsystem with Petri Nets: a Case Studyp. 291
Performance Modeling of Multithreaded Distributed Memory Architecturesp. 311
Table of Contents provided by Syndetics. All Rights Reserved.

ISBN: 9780792377917
ISBN-10: 0792377915
Audience: Professional
Format: Hardcover
Language: English
Number Of Pages: 332
Published: 29th February 2000
Publisher: Springer
Country of Publication: NL
Dimensions (cm): 23.4 x 15.6  x 2.52
Weight (kg): 1.47

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