+612 9045 4394
 
CHECKOUT
Hardware Description Languages and Their Applications Specification, Modelling, Verification and Synthesis :  Specification, Modelling, Verification and Synthesis of Microelectronic Systems - Delgado Kloos

Hardware Description Languages and Their Applications Specification, Modelling, Verification and Synthesis

Specification, Modelling, Verification and Synthesis of Microelectronic Systems

By: Delgado Kloos (Editor), Eduard Cerny (Editor)

Hardcover

Published: December 2009
Ships: 7 to 10 business days
7 to 10 business days
RRP $554.99
$383.90
31%
OFF
or 4 easy payments of $95.98 with Learn more

In the past few decades Computer Hardware Description Languages (CHDLs) have been a rapidly expanding subject area due to a number of factors, including the advancing complexity of digital electronics, the increasing prevalence of generic and programmable components of software-hardware and the migration of VLSI design to high level synthesis based on HDLs. Currently the subject has reached the consolidation phase in which languages and standards are being increasingly used, at the same time as the scope is being broadened to additional application areas. This book presents the latest developments in this area and provides a forum from which readers can learn from the past and look forward to what the future holds.

Preface
Specification and Design of Reactive Systemsp. 1
Synchronous languages for hardware and software reactive systemsp. 3
Towards a complete design method for embedded systems using Predicate/Transition-Netsp. 4
Verification Using Model Checking Techniquesp. 25
Simplifying data operations for formal verificationp. 27
CTL and equivalent sublanguages of CTLp. 40
Verifying linear temporal properties of data intensive controllers using finite instantiationsp. 60
A high-level language for programming complex temporal behaviors and its translation into synchronous circuitsp. 74
System-level hardware design with [mu]-chartsp. 77
Interface synthesis in embedded hardware-software systemsp. 80
TripleS-a formal validation environment for functional specificationsp. 83
SOFHIA: a CAD environment to design digital control systemsp. 86
Compiling the language BALSA to delay insensitive hardwarep. 89
High-level synthesis of structured data pathsp. 92
Formal Characterizations of Systemsp. 95
Characterizing a portable subset of behavioural VHDL-93p. 97
Algebra of communicating timing charts for describing and verifying hardware interfacesp. 114
A formal proof of absence of deadlock for any acyclic network of PCI busesp. 134
Analog Languagesp. 157
Behavioural modelling of sampled-data with HDL-A and ABSynthp. 159
Languages in Design Flowsp. 179
Hardware description languages in practical design flowsp. 181
VHDL generation from SDL specificationp. 182
Exploiting isomorphism for speeding up instance-binding in an integrated scheduling allocation and assignment approach to architectural synthesisp. 202
Future Trends in Hardware Designp. 213
Verification of large systems in siliconp. 215
The Shall Design test Development model for hardware systemsp. 240
Modular operational semantic specification of transport triggered architecturesp. 260
Formal Methods for Asynchronous and Distributed Systemsp. 281
The world of I/O: a rich application area for formal methodsp. 283
Abstract modelling of asynchronous micropipeline systems using Rainbowp. 285
A new partial order reduction algorithm for concurrent system verificationp. 305
VHDLp. 315
VHDL power simulator: power analysis at gate levelp. 317
Object oriented extensions to VHDL, the LaMI proposalp. 334
Index of contributorsp. 348
Keyword indexp. 349
Table of Contents provided by Blackwell. All Rights Reserved.

ISBN: 9780412788109
ISBN-10: 0412788101
Series: IFIP Advances in Information and Communication Technology
Audience: Professional
Format: Hardcover
Language: English
Number Of Pages: 350
Published: December 2009
Publisher: Chapman and Hall
Country of Publication: GB
Dimensions (cm): 23.5 x 15.5  x 1.91
Weight (kg): 1.51