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Floating Gate Devices : Operation and Compact Modeling - Paolo Pavan

Floating Gate Devices

Operation and Compact Modeling

Hardcover Published: 29th February 2004
ISBN: 9781402077319
Number Of Pages: 131

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Floating Gate Devices: Operation and Compact Modeling focuses on standard operations and compact modeling of memory devices based on Floating Gate architecture. Floating Gate devices are the building blocks of Flash, EPROM, EEPROM memories. Flash memories, which are the most versatile nonvolatile memories, are widely used to store code (BIOS, Communication protocol, Identification code,) and data (solid-state Hard Disks, Flash cards for digital cameras,).
The reader, who deals with Floating Gate memory devices at different levels - from test-structures to complex circuit design - will find an essential explanation on device physics and technology, and also circuit issues which must be fully understood while developing a new device. Device engineers will use this book to find simplified models to design new process steps or new architectures. Circuit designers will find the basic theory to understand the use of compact models to validate circuits against process variations and to evaluate the impact of parameter variations on circuit performances.
Floating Gate Devices: Operation and Compact Modeling is meant to be a basic tool for designing the next generation of memory devices based on FG technologies.

Contributing Authors
Compact modeling
Semiconductor memories
Floating gate devices
First commercial devices and products
Applications and market considerations
Principles of floating gate devices
Technology highlights
Cell operation
Disturbs and reliability
DC conditions: read
Traditional FG device models
The charge balance model
Simulation results
Transient conditions: program and erase
Models proposed in the literature
The charge balance model: the extension transient conditions
Fowler-Nordheim current
Channel hot electron current
Further possibilities of FG device compact models
Reliability prediction
Non volatile memory devices
Basic elements
Main building blocks of the device
Matrix and decoders
Operating modes
DMA test
Table of Contents provided by Publisher. All Rights Reserved.

ISBN: 9781402077319
ISBN-10: 1402077319
Audience: Professional
Format: Hardcover
Language: English
Number Of Pages: 131
Published: 29th February 2004
Publisher: Springer-Verlag New York Inc.
Country of Publication: US
Dimensions (cm): 23.5 x 15.5  x 1.27
Weight (kg): 0.4