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Field Programmable Logic and Applications : 7th International Workshop, FPL '97, London, U. K., September, 1-3, 1997, Proceedings :  7th International Workshop, FPL '97, London, U. K., September, 1-3, 1997, Proceedings - Wayne Luk

Field Programmable Logic and Applications : 7th International Workshop, FPL '97, London, U. K., September, 1-3, 1997, Proceedings

7th International Workshop, FPL '97, London, U. K., September, 1-3, 1997, Proceedings

By: Wayne Luk (Editor), Peter Y. K. Cheung (Editor), Manfred Glesner (Editor)

Paperback Published: September 1997
ISBN: 9783540634652
Number Of Pages: 512

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This book constitutes the refereed proceedings of the 7th International Workshop on Field Programmable Logic and Applications, FPL '97, held in London, UK, in September 1997. The 51 revised full papers in the volume were carefully selected from a large number of high-quality papers. The book is divided into sections on devices and architectures, devices and systems, reconfiguration, design tools, custom computing and codesign, signal processing, image and video processing, sensors and graphics, color and robotics, and applications.

Multicontext dynamic reconfiguration and real time probing on a novel mixed signal programmable device with on-chip microprocessorp. 1
CAD-oriented FPGA and dedicated CAD system for telecommunicationsp. 11
Rothko: A three dimensional FPGA architecture, its fabrication, and design toolsp. 21
Extending dynamic circuit switching to meet the challenges of new FPGA architecturesp. 31
Performance evaluation of a full speed PCI initiator and target subsystem using FPGAsp. 41
Implementation of pipelined multipliers on Xilinx FPGAsp. 51
The XC6200DS development systemp. 61
Thermal monitoring on FPGAs using ring-oscillatorsp. 69
A reconfigurable approach to low cost media processingp. 79
Riley-2: A flexible platform for codesign and dynamic reconfigurable computing researchp. 91
Stream synthesis for a wormhole run-time reconfigurable platformp. 101
Pipeline morphing and virtual pipelinesp. 111
Parallel Graph colouring using FPGAsp. 121
Run-time compaction of FPGA designsp. 131
Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancementp. 141
A case study of partially evaluated hardware circuits: Key-specific DESp. 151
Run-time parameterised circuits for the Xilinx XC6200p. 161
Automatic identification of swappable logic units in XC6200 circuitryp. 173
Towards an expert system for a priori estimation of reconfiguration latency in dynamically reconfigurable logicp. 183
Exploiting reconfigurability through domain-specific systemsp. 193
Technology mapping by binate coveringp. 203
VPR: A new packing, placement and routing tool for FPGA researchp. 213
Technology mapping of heterogeneous LUT-based FPGAsp. 223
Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAsp. 235
Technology mapping of LUT based FPGAs for delay optimisationp. 245
Automatic mapping of algorithms onto multiple FPGA-SRAM modulesp. 255
FPLD HDL synthesis employing high-level evolutionary algorithm optimisationp. 265
A hardware/software partitioning algorithm for custom computing machinesp. 274
The Java environment for reconfigurable computingp. 284
Data scheduling to increase performance of parallel acceleratorsp. 294
An operating system for custom computing machines based on the Xputer paradigmp. 304
Fast parallel implementation of DFT using configurable devicesp. 314
Enhancing fixed point DSP processor performance by adding CPLDs as coprocessing elementsp. 324
A case study of algorithm implementation in reconfigurable hardware and softwarep. 333
A reconfigurable data-localised array for morphological algorithmsp. 344
Virtual radix array processors (V-RaAP)p. 354
An FPGA implementation of a matched filter detector for spread spectrum communications systemsp. 364
An NTSC and PAL closed caption processorp. 374
A 800 Mpixel/sec reconfigurable image correlator on XC6216p. 382
A reconfigurable coprocessor for a PCI-based real time computer vision systemp. 392
Real-Time Stereopsis using FPGAsp. 400
FPGA implementation of a digital IQ demodulator using VHDLp. 410
Hardware compilation, configurable platforms and ASICs for self-validating sensorsp. 418
Postscript rendering with virtual hardwarep. 428
P4: A platform for FPGA implementation of protocol boostersp. 438
Satisfiability on reconfigurable hardwarep. 448
Auto-configurable array for GCD computationp. 457
Structural versus algorithmic approaches for efficient adders on Xilinx 5200 FPGAp. 462
FPGA implementation of real-time digital controllers using on-line arithmeticp. 472
A prototyping environment for fuzzy controllersp. 482
A reconfigurable sensor-data processing system for personal robotsp. 491
Authors Indexp. 501
Table of Contents provided by Blackwell. All Rights Reserved.

ISBN: 9783540634652
ISBN-10: 3540634657
Series: Lecture Notes in Computer Science,
Audience: General
Format: Paperback
Language: English
Number Of Pages: 512
Published: September 1997
Publisher: SPRINGER VERLAG GMBH
Country of Publication: DE
Dimensions (cm): 23.39 x 15.6  x 2.69
Weight (kg): 0.73