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Digital Computer Arithmetic Datapath Design Using Verilog Hdl : CD-ROM Included with CDROM :  CD-ROM Included with CDROM - James E. Stine

Digital Computer Arithmetic Datapath Design Using Verilog Hdl : CD-ROM Included with CDROM

CD-ROM Included with CDROM

Book with Other Items

Published: 1st April 2004
Ships: 7 to 10 business days
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This text presents basic implementation strategies for arithmetic datapath designs and methodologies utilized in the digital system. The author implements various datapath designs for addition, subtraction, multiplication, and division. Theory is presented to illustrate and explain why certain designs are chosen. Each implementation is discussed in terms of design choices and how particular theory is invoked in the hardware.
Along with the theory that emphasizes the design in question, Verilog modules are presented for understanding the basic ideas that accompany each design. Structural models are implemented to guarantee correct synthesis and for incorporation into VLSI schematic-capture programs. From the modules, the reader can easily add or modify existing code to study current areas of research in the area of computer arithmetic. The emphasis is on the arithmetic algorithm and not the circuit. For any design, both algorithmic and circuit trade-offs should be adhered to when a design is under consideration. Therefore, the idea is to implement each design at the RTL level so that it may be possibly implemented in many different ways (i.e. standard-cell or custom-cell). Thus, professionals, researchers, students, and those generally interested in computer arithmetic can understand how arithmetic datapath elements are designed and implemented.
Also included is a CD-ROM which contains the files discussed in the book. The CD-ROM includes additional files utilized in preparing the designs in Verilog including scripts to automatically generate Verilog code for parallel carry-save and tree multipliers. Each Verilog design also contains each module including testbenches to facilitatetesting and verification.

From the reviews: "This book concentrates on basic implementation strategies for arithmetic datapath designs. It shows how to write efficient Verilog code to describe the arithmetic circuits. ! The main objective of this small and nice book is to provide a good understanding of the arithmetic specifics of algorithms and points to their implementation strategies and methodologies used in the design of datapaths. ! The book is well written and readers, using it, will enjoy ! . All in all, I highly recommend this book." (Mile Stojcev, Microelectronics Reliability, Vol. 45, 2005)

Prefacep. ix
Motivationp. 1
Why Use Verilog HDL?p. 1
What this book is not : Main Objectivep. 2
Datapath Designp. 3
Verilog at the Rtl Levelp. 7
Abstractionp. 7
Naming Methodologyp. 10
Gate Instancesp. 11
Netsp. 12
Registersp. 12
Connection Rulesp. 13
Vectorsp. 14
Memoryp. 14
Nested Modulesp. 15
Force Feeding Verilog : the Test Benchp. 16
Test Benchesp. 18
Other Odds and Ends within Verilogp. 19
Concatenationp. 19
Replicationp. 21
Writing to Standard Outputp. 21
Stopping a Simulationp. 21
Timing: For Whom the Bell Tollsp. 22
Delay-based Timingp. 22
Event-Based Timingp. 23
Synopsys Design Ware Intellectual Property (IP)p. 24
Verilog 2001p. 24
Summaryp. 26
Additionp. 27
Half Addersp. 28
Full Addersp. 28
Ripple Carry Addersp. 30
Ripple Carry Adder/Subtractorp. 31
Carry Lookahead Addersp. 34
Block Carry Lookahead Generatorsp. 36
Carry Skip Addersp. 40
Optimizing the Block Size to Reduce Delayp. 42
Carry Select Addersp. 43
Optimizing the Block Size to Reduce Delayp. 46
Prefix Additionp. 47
Summaryp. 52
Multiplicationp. 55
Unsigned Binary Multiplicationp. 56
Carry-Save Conceptp. 56
Carry-Save Array Multipliers (CSAM)p. 60
Tree Multipliersp. 61
Wallace Tree Multipliersp. 61
Dadda Tree Multipliersp. 65
Reduced Area (RA) Multipliersp. 68
Truncated Multiplicationp. 71
Two's Complement Multiplicationp. 78
Signed-Digit Numbersp. 82
Booth's algorithmp. 86
Bitwise Operatorsp. 87
Radix-4 Modified Booth Multipliersp. 89
Signed Radix-4 Modified Booth Multiplicationp. 91
Fractional Multiplicationp. 92
Summaryp. 93
Division Using Recurrencep. 103
Digit Recurrencep. 104
Quotient Digit Selectionp. 105
Containment Conditionp. 106
Continuity Conditionp. 106
On-the-Fly-Conversionp. 108
Radix 2 Divisionp. 112
Radix 4 Division with [alpha] = 2 and Non-redundant Residualp. 115
Redundant Adderp. 118
Radix 4 Division with [alpha] = 2 and Carry-Save Adderp. 119
Radix 16 Division with Two Radix 4 Overlapped Stagesp. 122
Summaryp. 126
Elementary Functionsp. 129
Generic Table Lookupp. 131
Constant Approximationsp. 133
Piecewise Constant Approximationp. 134
Linear Approximationsp. 136
Round to Nearest Evenp. 138
Bipartite Table Methodsp. 141
SBTM and STAMp. 142
Shift and Add: CORDICp. 147
Summaryp. 152
Division Using Multiplicative-Based Methodsp. 161
Newton-Raphson Method for Reciprocal Approximationp. 161
Multiplicative-Divide Using Convergencep. 166
Summaryp. 168
Referencesp. 171
Indexp. 179
Table of Contents provided by Ingram. All Rights Reserved.

ISBN: 9781402077104
ISBN-10: 1402077106
Series: International Series in Operations Research›and Management Science
Audience: Tertiary; University or College
Format: Book with Other Items
Language: English
Number Of Pages: 181
Published: 1st April 2004
Publisher: Springer-Verlag New York Inc.
Country of Publication: US
Dimensions (cm): 23.5 x 15.5  x 1.68
Weight (kg): 0.46