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Design of Interconnection Networks for Programmable Logic - Guy Lemieux

Design of Interconnection Networks for Programmable Logic

Hardcover

Published: 30th November 2003
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The complexity of digital logic systems has increased steadily and rapidly for the last several decades due to a steady trend in technology scaling. As current manufacturing technology reaches the deep-submicron level, more and more low-level design effort is required to create a working design. This presents a growing cost and productivity problem for digital systems, which are also tending to increase in complexity at the systems level. At the same time, the capabilities of programmable logic devices have been advancing as they have progressed from PALs to CPLDs and now to FPGAs. Modern-day FPGAs can implement entire digital systems. They are increasingly attractive to systems-level designers, but in many cases their performance is inadequate, or they contain insufficient memory, or they lack key intellectual property cores. Hence, there is a growing demand for merging programmable logic technology with custom deep-submicron VLSI technology. If there is one particular aspect of programmable logic that is not well understood, that consumes the most area, or that is responsible for the most delay, it is the interconnect. This volume presents the latest research results on the design of interconnect for programmable logic. The emphasis is on building the knowledge and tools for the automatic generation of interconnect structures. In this regard, the book presents design methodologies and applications for sparsely populated crossbars, clusters of lookup tables, switch blocks, and transistor-level routing switch design. It provides valuable information for both designers and architects about the area and delay implications of programmable interconnect. FPGA architects and System-on-Chip designers interested in exploring the integration of custom logic and programmable logic should find this work particularly useful.

Dedication
List of Figures
List of Tables
List of Symbols
Foreword
Introductionp. 1
Interconnection Networksp. 9
Models, Methodology and CAD Toolsp. 25
Sparse Crossbar Designp. 39
Sparse Cluster Designp. 81
Routing Switch Circuit Designp. 101
Switch Block Designp. 141
Conclusionsp. 167
Switches Blocks: Reduced Flexibilityp. 171
Switch Blocks: Diverse Design Instancesp. 183
VPRx: VPR Extensionsp. 185
Referencesp. 193
Indexp. 205
Table of Contents provided by Blackwell. All Rights Reserved.

ISBN: 9781402077005
ISBN-10: 1402077009
Audience: General
Format: Hardcover
Language: English
Number Of Pages: 206
Published: 30th November 2003
Publisher: Springer-Verlag New York Inc.
Country of Publication: US
Dimensions (cm): 23.5 x 15.88  x 1.91
Weight (kg): 0.52