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Assertion-Based Design : Information Technology: Transmission, Processing & Storage - Harry D. Foster

Assertion-Based Design

Information Technology: Transmission, Processing & Storage

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Published: 19th May 2004
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Chapter 3 Specifying RTL Properties 61 3. 1 Definitions and concepts 62 62 3. 1. 1 Property 3. 1. 2 Events 65 3. 2 Property classification 65 Safety versus liveness 66 3. 2. 1 3. 2. 2 Constraint versus assertion 67 3. 2. 3 Declarative versus procedural 67 3. 3 RTL assertion specification techniques 68 RTL invariant assertions 69 3. 3. 1 3. 3. 2 Declaring properties with PSL 72 RTL cycle related assertions 73 3. 3. 3 3. 3. 4 PSL and default clock declaration 74 3. 3. 5 Specifying sequences 75 3. 3. 6 Specifying eventualities 80 3. 3. 7 PSL built-in functions 82 3. 4Pragma-based assertions 82 3. 5 SystemVerilog assertions 84 3. 5. 1 Immediate assertions 84 3. 5. 2Concurrent assertions 86 3. 5. 3 System functions 95 3. 6 PCI property specification example 96 3. 6. 1 PCI overview 96 3. 7 Summary 102 Chapter 4 PLI-Based Assertions 103 4. 1 Procedural assertions 104 4. 1. 1 A simple PLI assertion 105 4. 1. 2 Assertions within a simulation time slot 108 4. 1. 3 Assertions across simulation time slots 111 4. 1. 4 False firing across multiple time slots 116 4. 2 PLI-based assertion library 118 4. 2. 1 Assert quiescent state 119 4. 3 Summary 123 Chapter 5 Functional Coverage 125 5. 1 Verification approaches 126 5. 2 Understanding coverage 127 5. 2. 1 Controllability versus observability 128 5. 2.

"David Lacey, Harry and Adam are key participants on the Acceller SystemVerilog Standards Group. Their practical verification experience has contributed to the value of the assertion enhancements added to the SystemVerilog standard. These three verification specialists have written a book that will endow the reader with an understanding of the fundamental and important topics needed to comprehend and implement assertion based design. This book is a must for all design and verification engineers."
(Cliff Cummings, Verilog Guru & President, Sunburst Design, Inc.)

Forewordp. xv
Prefacep. xvii
Introductionp. 1
Property checkingp. 1
Verification techniquesp. 3
What is an assertion?p. 4
A historical perspectivep. 5
Do assertions really work?p. 7
What are the benefits of assertions?p. 8
Why are assertions not used?p. 12
Phases of the design processp. 15
Ensuring requirements are satisfiedp. 18
Techniques for ensuring consistencyp. 19
Roles and ownershipp. 21
Summaryp. 21
Assertion Methodologyp. 23
Design methodologyp. 23
Project planningp. 24
Project documentsp. 25
EDA and internal toolsp. 26
RTL styles and conventionsp. 27
Support infrastructurep. 28
Partner coordinationp. 29
Design requirementsp. 30
Design documentsp. 31
Design reviewsp. 32
Design validationp. 32
Assertion methodology for new designsp. 33
Key learningsp. 34
Best practicesp. 36
Assertion densityp. 40
Process for adding assertionsp. 42
When not to add assertionsp. 43
Assertion methodology for existing designsp. 44
Assertions and simulationp. 45
Assertions and formal verificationp. 48
Formal verification frameworkp. 48
Formal methodologyp. 52
ECC examplep. 58
Summaryp. 60
Specifying RTL Propertiesp. 61
Definitions and conceptsp. 62
Propertyp. 62
Eventsp. 65
Property classificationp. 66
Safety versus livenessp. 66
Constraint versus assertionp. 67
Declarative versus proceduralp. 67
RTL assertion specification techniquesp. 68
RTL invariant assertionsp. 69
OVL invariantp. 69
PSL invariantp. 72
Declaring properties with PSLp. 73
RTL cycle related assertionsp. 74
PSL and default clock declarationp. 76
Specifying sequencesp. 76
Declaring sequences within PSLp. 80
Sequence operators within PSLp. 80
Checking sequences with the OVLp. 81
Specifying eventualitiesp. 82
OVL event bounded window checkersp. 83
PSL built-in functionsp. 83
Pragma-based assertionsp. 84
System Verilog assertionsp. 85
Immediate assertionsp. 86
Concurrent assertionsp. 88
Sequence declarationp. 92
Sequence operationsp. 92
Repetition operatorsp. 93
First match operatorp. 95
Throughout operatorsp. 96
Dynamic variables within sequencesp. 96
System functionsp. 98
PCI property specification examplep. 98
PCI overviewp. 99
Summaryp. 105
PLI-Based Assertionsp. 107
Procedural assertionsp. 108
A simple PLI assertionp. 110
Checktf routinep. 110
Calltf routinep. 111
Assertions within a simulation time slotp. 112
Nested PLI assertion problemp. 115
Assertions across simulation time slotsp. 116
Controlling assertion evaluations by a clockp. 117
False firing across multiple time slotsp. 121
PLI-based assertion libraryp. 123
Assert quiescent statep. 124
Summaryp. 129
Functional Coveragep. 131
Verification approachesp. 133
Understanding coveragep. 134
Controllability versus observabilityp. 134
Types of traditional coverage metricsp. 135
What is functional coverage?p. 137
Building functional coverage modelsp. 138
Sources of functional coveragep. 139
Does functional coverage really work?p. 141
Benefits of functional coveragep. 141
Success storiesp. 142
Why is functional coverage not usedp. 143
Functional coverage methodologyp. 144
Steps to functional coveragep. 145
Correct coverage densityp. 146
Incorrect coverage densityp. 148
Coverage analysisp. 149
Coverage data organizationp. 150
Tracking functional coveragep. 152
Actions to takep. 152
Coverage best practicesp. 153
Coverage-driven test generationp. 157
Specifying functional coveragep. 158
Embedded in the RTLp. 158
Functional coverage librariesp. 159
Assertion-based methodsp. 160
Post processingp. 162
PLI logging and reportingp. 162
Simulation controlp. 162
Functional coverage examplesp. 163
AHB examplep. 166
Summaryp. 169
Assertion Patternsp. 171
Introduction to patternsp. 171
What are assertion patterns?p. 172
Elements of an assertion patternp. 173
Signal patternsp. 174
X detection patternp. 175
Valid range patternp. 177
One-hot patternp. 180
Gray-code patternp. 183
Set patternsp. 184
Valid opcode patternp. 184
Valid signal combination patternp. 186
Invalid signal combination patternp. 189
Conditional patternsp. 190
Conditional expression patternp. 190
Sequence implication patternp. 193
Past and future event patternsp. 197
Past event patternp. 197
Future event patternp. 199
Window patternsp. 201
Time-bounded window patternsp. 202
Event-bounded window patternsp. 205
Sequence patternsp. 207
Forbidden sequence patternsp. 207
Buffered data validity patternp. 208
Tagged transaction patternp. 209
Pipelined protocol patternp. 213
Applying patterns to a real examplep. 216
Intra-interface assertionsp. 218
Inter-interface assertionsp. 222
Summaryp. 224
Assertion Cookbookp. 225
Queue--FIFOp. 227
Fixed depth pipeline registerp. 233
Stack--LIFOp. 237
Caches--direct mappedp. 240
Cache--set associativep. 246
FSMp. 251
Countersp. 255
Multiplexersp. 259
Encoded multiplexerp. 259
Decoded (one-hot) multiplexerp. 260
Priority multiplexerp. 262
Complex multiplexerp. 263
Encoderp. 264
Priority encoderp. 266
Simple single request protocolp. 267
In-order multiple request protocolp. 270
Out-of-order request interfacep. 273
State tablesp. 275
Memoriesp. 277
Arbiterp. 280
Summaryp. 284
Open Verification Libraryp. 285
OVL methodology advantagesp. 285
OVL standard definitionp. 286
OVL runtime macro controlsp. 287
Customizing OVL messagesp. 288
Firing OVL monitorsp. 290
Using OVL assertion monitorsp. 291
Checking invariant propertiesp. 292
Assert_alwaysp. 292
Assert_neverp. 294
Assert_zero_one_hotp. 296
Assert_rangep. 298
Checking cycle relationshipsp. 299
Assert_nextp. 299
Assert_framep. 301
Assert_cycle_sequencep. 304
Checking event bounded windowsp. 306
Assert_win_changep. 306
Assert_win_unchangep. 308
Checking time bounded windowsp. 310
Assert_changep. 310
Assert_unchangep. 312
Checking state transitionsp. 314
Assert_no_transitionp. 314
Assert_transitionp. 315
PSL Property Specification Languagep. 319
Introduction to PSLp. 319
Operators and keywordsp. 320
PSL Boolean layerp. 323
PSL Temporal Layerp. 323
Named SEREp. 324
SERE concatenation (;) operatorp. 324
Consecutive repetition ([*]) operatorp. 324
Nonconsecutive repetition ([=]) operatorp. 326
Goto repetition ([- greater than sign]) operatorp. 327
Sequence fusion (:) operatorp. 328
Sequence non-length-matching (&) operatorp. 328
Sequence length-matching (&&) operatorp. 328
Sequence or ([vertical bar]) operatorp. 329
Until* sequence operatorsp. 329
Within* sequence operatorsp. 329
Next operatorp. 330
Eventually! operatorp. 330
Before* operatorsp. 331
Abort operatorp. 331
Endpoint declarationp. 332
Suffix implication operatorsp. 332
Logical implication operatorp. 333
Always temporal operatorp. 333
Never temporal operatorp. 333
PSL propertiesp. 334
Property declarationp. 334
Named propertiesp. 334
Property clockingp. 334
Forall property replicationp. 335
The verification layerp. 335
Assert directivep. 336
Assume directivep. 336
Cover directivep. 336
The modeling layerp. 336
Rose() and fell() functionsp. 337
Prev() and next() functionsp. 337
BNFp. 337
Verilog Extensionsp. 338
Flavor macrosp. 339
Syntax productionsp. 340
System Verilog Assertionsp. 347
Introduction to System Verilogp. 347
Operator and keywordsp. 347
Sequence and property operationsp. 349
Temporal delayp. 349
Consecutive repetitionp. 351
Goto repetitionp. 351
Nonconsecutive repetitionp. 352
Sequence andp. 353
Sequence intersectionp. 354
Sequence orp. 355
Boolean until (throughout)p. 355
Within sequencep. 356
Endedp. 357
Matchedp. 357
First matchp. 358
Implicationp. 358
Sequences and propertiesp. 359
Assert and cover statementsp. 363
Dynamic data within sequencesp. 364
Templatesp. 365
System Functionsp. 366
System Tasksp. 367
BNFp. 368
Use of Assertions BNFp. 369
Assertion statementsp. 369
Property and sequence declarationsp. 370
Property constructionp. 370
Sequence constructionp. 371
Template declarationp. 373
Table of Contents provided by Ingram. All Rights Reserved.

ISBN: 9781402080272
ISBN-10: 1402080271
Series: Information Technology: Transmission, Processing & Storage
Audience: Professional
Format: Hardcover
Language: English
Number Of Pages: 390
Published: 19th May 2004
Publisher: Springer-Verlag New York Inc.
Country of Publication: US
Dimensions (cm): 23.5 x 15.5  x 3.18
Weight (kg): 1.68
Edition Number: 2
Edition Type: Revised