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Architecture Design and Validation Methods - Egon Borger

Architecture Design and Validation Methods

By: Egon Borger (Editor)

Hardcover Published: 13th April 2000
ISBN: 9783540649762
Number Of Pages: 357

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This state-of-the-art survey gives a systematic presentation of recent advances in the design and validation of computer architectures. Based on advanced research ideas and approaches, and written by eminent researchers in the field, seven chapters cover the whole range from computer aided high-level design of VLSI circuits and systems to layout and testable design, including modeling and synthesis of behavior, of control, and of dataflow, cell based logic optimization, machine assisted verification, and virtual machine design. The chapters presuppose only basic familiarity with computer architecture. They are self-contained and lead the reader gently and informatively to the forefront of current research. A special feature of the book is the comprehensive range of architecture design and validation topics covered, giving the reader a clear view of the problems and of advanced techniques for their solution.

Modeling and Synthesis of Behavior, Control and Data Flowp. 1
Introductionp. 1
Behavioral Synthesisp. 3
High-Level Controlp. 15
Data Flowp. 24
Conclusionp. 42
Referencesp. 42
Cell-based Logic Optimizationp. 49
Introductionp. 49
Problem Formulation and Analysisp. 49
Algorithms for Library Bindingp. 52
Boolean Matchingp. 60
Generalized Matchingp. 78
Conclusionp. 83
Referencesp. 84
A Design Flow for Performance Planning: New Paradigms for Iteration Free Synthesisp. 89
Introductionp. 89
Flow Componentsp. 92
Layout Synthesisp. 99
Placement Versus Floorplan Designp. 101
Global Wiresp. 115
Wire Planningp. 122
Gate Sizingp. 127
Conclusionsp. 137
Referencesp. 138
Test and Testable Designp. 141
Introductionp. 141
Defect Analysis and Fault Modelingp. 143
External Testingp. 155
Self-Testable Systems-On-Chipp. 162
Referencesp. 185
Machine Assisted Verificationp. 191
Introductionp. 191
Logic Verificationp. 195
Bit-Vector and Word-Level Verificationp. 207
Verification by Fixed-Point Calculationsp. 211
Verification Techniques for Bounded State Sequencesp. 218
Formally Correct Construction of Pipelined Systemsp. 231
Referencesp. 238
Models of Computation for System Designp. 243
Introductionp. 243
MOCs: Basic Concepts and the Tagged Signal Modelp. 248
Common Models of Computationp. 261
Codesign Finite State Machinesp. 276
Conclusionsp. 289
Referencesp. 292
Modular Design for the Java Virtual Machine Architecturep. 297
Introductionp. 297
The Trustful Virtual Machinep. 301
The Defensive Virtual Machinep. 313
The Diligent Virtual Machinep. 323
The Dynamic Virtual Machinep. 334
Related and Future Workp. 344
The JVM Abstract State Machinep. 346
Referencesp. 356
Table of Contents provided by Publisher. All Rights Reserved.

ISBN: 9783540649762
ISBN-10: 354064976X
Audience: Professional
Format: Hardcover
Language: English
Number Of Pages: 357
Published: 13th April 2000
Country of Publication: DE
Dimensions (cm): 24.16 x 16.51  x 2.34
Weight (kg): 0.59